Integrated Clamping Diode for MOSFET Avalanche Current Segmentation

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Solution Overview

Problem

MOSFET semiconductor devices experience voltage spikes and repetitive avalanche events due to current changes and inductances, leading to variations in device parameters and potential failure, with existing clamp diodes either increasing the active area breakdown voltage or being ineffective for repetitive high current and avalanche pulses.

Innovation Solution

A MOSFET semiconductor device with an integrated p-n junction clamping diode, where the clamping diode has a lower breakdown voltage than the MOSFET, allowing it to receive lower avalanche current and the MOSFET to handle higher avalanche current, with the clamping resistance modified by varying the density and area of shallow conductive trenches.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a clamp diode is used to prevent avalanche, then the active area breakdown voltage must be increased, but this increases the Rds(on) of the device

Engineering Contradiction:
Improveavalanche preventionVSAvoidRds(on)
Core Design Contradiction:
ReliabilityVSPower

Solution Approach 1:

The invention divides the avalanche current handling into two segments: the integrated clamp diode handles lower avalanche current, while the MOSFET active area handles higher avalanche current. This segmentation allows the clamp diode to operate at a lower breakdown voltage (reducing Rds(on)) while still providing effective avalanche protection for repetitive pulses.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The MOSFET device is designed to serve multiple functions: it acts as both the main switching device and an avalanche current handler. The active area can handle high avalanche current when needed, making the device universal in handling both normal operation and avalanche conditions without requiring a higher breakdown voltage.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If parallel clamp diodes are used, then single event high current avalanche is handled, but they are ineffective for repetitive avalanche pulses

Engineering Contradiction:
Improveavalanche pulse handlingVSAvoidrepetitive pulse capability
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The invention merges the clamp diode function with the MOSFET body diode by integrating the p-n junction clamp diode within the MOSFET structure. This combined structure is designed to handle both single event high current avalanche and repetitive avalanche pulses, providing versatility across different operating conditions.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The clamp diode is designed with dynamic characteristics that allow it to adapt to different avalanche conditions. The integrated structure can dynamically switch between handling low-current repetitive pulses and supporting high-current single events, providing adaptability across various avalanche scenarios.

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively prevents the MOSFET active area from avalanching, maintaining device parameters and reducing the risk of failure, while allowing for higher current handling and reduced switching losses by controlling avalanche events and minimizing voltage spikes.

Implementation Method 1

the clamping diode defines a second breakdown voltage, wherein the first breakdown voltage is greater than the second breakdown voltage such that the clamp diode is configured and arranged receive lower avalanche current

Methodology Applied
Scientific EffectBreakdown voltage: Avalanche Breakdown

Data Source

PatentUS11088273B2Semiconductor device with integrated clamp diode
Publication Date: 2021.08.10 NEXPERIA BV
  • US11088273B2 patent drawing
  • US11088273B2 patent drawing
  • US11088273B2 patent drawing

AI summary

The present disclosure relates to a semiconductor device, and associated method of manufacture. The semiconductor device includes, MOSFET integrated with a p-n junction, the p-n junction arranged as a clamping diode across a source contact and a drain contact of the MOSFET. The MOSFET defines a first breakdown voltage and the clamping diode defines a second breakdown voltage, with the first breakdown voltage being greater than the second breakdown voltage so that the clamp diode is configured and arranged to receive a low avalanche current and the MOSFET is configured and arranged to receive a high avalanche current.