HV MOSFET Package Clip Structure for Cooling and Insulation
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Solution Overview
Problem
Existing high voltage MOSFET devices face challenges in achieving compact size, efficient heat dissipation, and reliable electrical insulation, particularly in horizontal packages, due to complex manufacturing processes and critical alignment requirements of dissipating plates.
Innovation Solution
The development of a packaged high voltage MOSFET device with projecting source connection regions and a flat dissipating plate that is electrically insulated from gate structures, allowing for dual-side cooling and simplified manufacturing, using a conductive plate with a planar face bonded to source connection regions, and a dielectric package mass.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If dissipating plate is directly bonded to gate structures, then heat dissipation efficiency is improved, but manufacturing complexity and error risk increase
Solution Approach 1:
The patent introduces an intermediary metal clip structure that is bonded to the gate structures, which then receives the dissipating plate. This intermediate clip acts as a mediator between the gate structures and the dissipating plate, simplifying the bonding process and reducing manufacturing complexity while maintaining effective heat dissipation from the gate regions.
2Loss of energy
If dissipating plate is positioned close to gate structures, then heat dissipation efficiency is improved, but electrical insulation reliability deteriorates
Solution Approach 1:
The metal clip serves as an intermediary that provides both thermal conduction path and electrical insulation. The clip is bonded to the gate structures for heat extraction while its positioning and design maintain appropriate clearance from high-voltage regions, thus ensuring electrical insulation reliability while achieving effective heat dissipation.
Solution Approach 2:
The dissipating plate is designed with non-uniform thickness, having a first thickness in regions closer to gate structures and a second thickness in regions farther away. This local quality variation allows optimized heat dissipation proximity while maintaining electrical insulation through increased thickness in critical insulation regions.
3Loss of energy
If dissipating plate size is customized for each die layout, then heat dissipation efficiency is improved, but manufacturing cost and complexity increase
Solution Approach 1:
The patent designs the dissipating plate with a standardized configuration that can be universally applied across different die layouts. The metal clip and dissipating plate assembly serves multiple functions: heat dissipation, electrical insulation, and mechanical support. This universal design reduces manufacturing cost and complexity while maintaining adequate heat dissipation efficiency through the standardized thermal pathways.
4Volume of moving object
If package thickness is reduced for compact size, then device compactness is improved, but electrical insulation and heat dissipation performance deteriorate
Solution Approach 1:
The patent optimizes the vertical dimension (thickness) by implementing a multi-layer structure with the metal clip and dissipating plate arranged in specific vertical positions. The dissipating plate is positioned to provide adequate electrical insulation from high-voltage regions while the overall package thickness is minimized through efficient vertical stacking of functional layers, thus achieving compactness without sacrificing insulation performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enables compact, reliable high voltage MOSFET devices with improved thermal and electrical insulation, reduced manufacturing complexity, and increased design flexibility, supporting high current and voltage applications.
Implementation Method 1
a metal support, a dissipating region... The metal support is bonded to the second surface of the semiconductor die
Implementation Method 2
a package mass of dielectric material... extending between the support and the dissipating region
Data Source
AI summary
An HV MOSFET device has a body integrating source conductive regions. Projecting gate structures are disposed above the body, laterally offset with respect to the source conductive regions. Source contact regions, of a first metal, are arranged on the body in electric contact with the source conductive regions, and source connection regions, of a second metal, are arranged above the source contact regions and have a height protruding with respect to the projecting gate structures. A package includes a metal support bonded to a second surface of the body, and a dissipating region, above the first surface of the semiconductor die. The dissipating region includes a conductive plate having a planar face bonded to the source connection regions and spaced from the projecting gate structures. A package mass of dielectric material is disposed between the support and the dissipating region and incorporates the semiconductor die. The dissipating region is a DBC-type insulation multilayer.