MOSFET Drain Resistance Layout for Higher ESD Immunity
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Solution Overview
Problem
Advanced MOSFET and CMOS devices face challenges in electrostatic discharge (ESD) immunity, particularly during deep-submicron fabrication processes, where existing methods suffer from low epitaxy quality and ESD performance degradation.
Innovation Solution
A through substrate resistive component is connected in series with the drain terminal of a transistor, providing additional resistance to shield the drain from high-energy ESD pulses, utilizing a wafer stack with a back end-of-line fabrication process and a power delivery network to enhance ESD immunity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a large space is added between the drain metal contact and the gate edge to add resistance in series with the drain, then ESD immunity is improved, but epitaxy quality deteriorates leading to ESD performance degradation
Solution Approach 1:
The patent transitions from a planar resistance structure to a vertical three-dimensional resistive component that extends through the substrate thickness. This vertical configuration adds resistance in series with the drain terminal while avoiding the epitaxy quality issues associated with large lateral spaces in deep-submicron fabrication processes.
Solution Approach 2:
The resistive component is formed as part of the substrate structure before final device assembly, pre-establishing the series resistance path that will protect against ESD events. This preliminary configuration ensures proper resistance values are achieved without compromising subsequent fabrication steps.
2Reliability
If additional resistance is connected in series with the drain terminal to shield from high-energy ESD pulses, then ESD immunity is improved, but device complexity increases
Solution Approach 1:
The resistive component is merged with the substrate structure itself, combining the substrate's mechanical support function with the electrical resistance function. This integration eliminates the need for separate resistance components and reduces overall device complexity while maintaining ESD protection capabilities.
Solution Approach 2:
The substrate serves multiple functions: providing mechanical support, establishing electrical connections, and incorporating the resistive component for ESD protection. This multi-functionality reduces the total number of discrete components needed in the device structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution improves ESD immunity by allowing the drain to tolerate higher voltages and large hot carrier injections, with lower process impact and improved epitaxy control compared to prior approaches.
Implementation Method 1
a first contact terminal of the resistive component is connected to a drain terminal of a transistor... the resistive component provides an ESD immunity by enabling the drain of the transistor to tolerate higher voltages
Data Source
AI summary
An apparatus for providing electrostatic discharge (ESD) immunity and a method for fabricating the same are disclosed herein. The apparatus comprises a field effect transistor (FET) formed on a semiconductor substrate in a front-end-of-line (FEOL) layer during an FEOL process, a metal interconnect layer formed on top of the FEOL layer during a back-end-of-line (BEOL) process, wherein the metal interconnect layer comprises a plurality interconnects configured to interconnect the FET to a plurality of components formed on the semiconductor substrate, a power delivery network (PDN) formed under the semiconductor substrate in a backside layer during a backside back-end-of-line (B-BEOL) process, and a through substrate resistive component formed between the FEOL and B-BEOL layers, wherein a first contact of the through substrate resistive component is connected to a drain terminal of the FET and second contact is connected, through the PDN, to a power supply rail.