Power MOSFET Gate Switching Using Miller Plateau Timing
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Solution Overview
Problem
In applications like brushless DC motors and DC/DC converters, the switching of power MOSFETs leads to oscillations due to parasitic reactive components, causing electromagnetic compatibility issues with emissions exceeding limits.
Innovation Solution
A method for switching power transistors that uses at least three control values for the gate, with timing adjustments based on a Miller plateau detector to minimize oscillations and emissions, without requiring external components or high-resolution timers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If power MOSFETs are switched using conventional single control value method, then switching speed is fast, but oscillations and electromagnetic emissions exceed compatibility limits
Solution Approach 1:
The gate control signal is segmented into at least three distinct control values (first, second, and third control values) applied in sequence. The first control value initiates switching, the second control value (different from first and third) is applied during the Miller plateau phase to control oscillations, and the third control value completes the switching. This segmentation of the control signal resolves the contradiction by reducing electromagnetic emissions through controlled multi-stage switching while managing the inherent complexity through structured control sequences.
2Object-affected harmful factors
If multiple control values are used for gate switching, then electromagnetic emissions are reduced, but switching time increases
Solution Approach 1:
The control signal dynamically adapts its characteristics based on the switching phase. The controller applies different control values (first, second, third) at different stages of the switching process, with the second control value specifically applied during the Miller plateau detection window. This dynamic control approach reduces electromagnetic emissions by controlling the gate voltage transition rates at critical phases while maintaining overall switching speed through optimized timing of each control stage.
3Manufacturing precision
If external components and high-resolution timers are used for timing control, then switching precision is improved, but device complexity and cost increase
Solution Approach 1:
The system uses self-service through Miller plateau detection to achieve precise timing control without external components. The controller detects the Miller plateau phase inherent in the MOSFET's switching characteristics and uses this naturally occurring signal to time the application of the second control value. This self-service approach provides accurate switching timing control while avoiding the need for external high-resolution timers and associated complexity.
Solution Approach 2:
The Miller plateau detection serves as an intermediary mechanism between the control signal and the MOSFET switching process. By detecting the Miller plateau phase (a natural characteristic of MOSFET switching), the controller can precisely time the application of the second control value without requiring external timing components. This intermediary detection method achieves high timing precision while minimizing device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces power losses and electromagnetic emissions while ensuring compliance with electromagnetic compatibility standards, achieved through integrated circuit implementation without additional external components.
Implementation Method 1
a Miller plateau detector for detecting a Miller plateau in a gate-source voltage of the respective power transistor
Data Source
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AI summary
The invention relates to a method for switching power transistors (HS, LS) in a power transistor circuit (1), wherein the power transistors (HS, LS) each have a gate (G) which is sequentially controlled with at least three control values (Ig1, Ig2, Ig3) during a turn-on sequence and/or a turn-off sequence, between which switching occurs at certain times (t1, t2), wherein the times (t1, t2) are determined or modified by means of a controller (2.1) which is controlled by a Miller plateau detector (2.2) to detect a Miller plateau (MP) in a gate-source voltage (VGS) of the respective power transistor (HS, LS).