MOSFET and Dual-Gate JFET Cascode Circuit for High Breakdown Voltage
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Solution Overview
Problem
Conventional semiconductor devices face a tradeoff between improved RF performance and higher breakdown voltage, limiting their usefulness in power applications due to reduced breakdown voltage and increased on-state resistance.
Innovation Solution
A double-gate semiconductor device comprising a MOS gate and a junction gate, where the bias of the junction gate is a function of the gate voltage of the MOS gate, providing a higher breakdown voltage and improved RF capability by dynamically controlling the conductive characteristics of the semiconductor structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If gate geometries are reduced to improve RF performance, then RF capability is improved, but breakdown voltage is reduced
Solution Approach 1:
The device is segmented into two distinct transistor types: a MOSFET for RF signal processing and a JFET for voltage handling and current control. This segmentation allows each transistor to be optimized for its specific function, with the JFET providing high breakdown voltage capability and the MOSFET providing superior RF performance, thereby resolving the contradiction between RF performance and breakdown voltage.
Solution Approach 2:
The invention uses a composite structure combining MOSFET and JFET technologies in a single integrated device. The MOSFET portion handles high-frequency signals with its optimized gate geometry, while the JFET portion provides high breakdown voltage through its different semiconductor structure and doping profile, achieving both RF performance and high voltage capability simultaneously.
2Power
If current drive is increased to compensate for lower breakdown voltage, then power output is maintained, but transistor width must be increased creating capacitive load
Solution Approach 1:
The JFET acts as an intermediary device between the high-voltage power supply and the MOSFET. It controls the current flowing through the MOSFET through its transconductance characteristics, allowing high current drive capability without requiring the MOSFET itself to have excessive width, thereby maintaining lower capacitive load while achieving the required power output.
3Reliability
If LDMOS transistors are used to achieve higher breakdown voltage, then breakdown voltage is improved, but on-state resistance increases
Solution Approach 1:
The invention changes the key parameter of transistor type from LDMOS to a MOSFET-JFET combination. The JFET portion provides high breakdown voltage through its depletion-mode operation and different doping structure, while the MOSFET portion maintains low on-state resistance through its enhancement-mode characteristics and optimized channel, avoiding the high resistance penalty associated with LDMOS devices.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The double-gate semiconductor device achieves high breakdown voltage and improved RF performance, enabling operation at higher power levels compared to conventional CMOS devices while maintaining efficient current flow and voltage excursion.
Implementation Method 1
A double-gate semiconductor device comprises a MOS gate and a junction gate, where the bias of the junction gate is a function of the gate voltage of the MOS gate, providing a higher breakdown voltage and improved RF capability by dynamically controlling the conductive characteristics of the semiconductor structure
Data Source
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AI summary
Electronic circuits and methods are provided for various applications including signal amplification. An exemplary electronic circuit comprises a MOSFET and a dual-gate JFET in a cascode configuration. The dual-gate JFET includes top and bottom gates disposed above and below the channel. The top gate of the JFET is controlled by a signal that is dependent upon the signal controlling the gate of the MOSFET. The control of the bottom gate of the JFET can be dependent or independent of the control of the top gate. The MOSFET and JFET can be implemented as separate components on the same substrate with different dimensions such as gate widths.