MOSFET Multilevel Plasma Pulser for IEDF and Etch Selectivity
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Solution Overview
Problem
The semiconductor industry faces challenges in achieving high aspect ratio features with reliable throughput during sub-10 nm semiconductor device fabrication, primarily due to issues with etch selectivity, uniformity, and the limitations of existing RF bias sources which can cause arcing and crosstalk problems.
Innovation Solution
A plasma processing system utilizing a bias pulsing scheme to produce micropulses, which includes a MOSFET-based three-stage topology to generate customizable multilevel output waveforms, thereby increasing the effective output frequency and providing additional tuning knobs for plasma etch recipes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple RF bias sources are incorporated to enable additional level of etch controls, then etch selectivity and uniformity are improved, but arcing problems and crosstalk issues occur
Solution Approach 1:
The patent applies periodic pulsed power instead of continuous RF bias to the cathode, creating time-varying voltage cycles that allow plasma chemistry to be controlled during different phases of the pulse, achieving etch selectivity without the harmful effects of continuous RF including arcing and crosstalk
2Adaptability or versatility
If inductive adder-based DC power supplies are used, then robust pulsing capability is achieved, but operating switching frequency is limited due to limited flux density swing of magnetic cores
Solution Approach 1:
The patent replaces the mechanical inductive adder system with a solid-state MOSFET-based voltage multiplier circuit, eliminating magnetic core limitations and enabling switching frequencies in the MHz range while maintaining robust pulsed power capability
3Device complexity
If MOSFET-based power supplies are used, then superior switching capability and smaller footprint are achieved, but switching loss increases proportionally with switching frequency leading to complex cooling mechanisms
Solution Approach 1:
The patent uses SiC and GaN MOSFETs which fundamentally change the material parameters compared to traditional silicon MOSFETs, enabling operation at MHz frequencies with significantly reduced switching losses that do not require complex cooling mechanisms
4Manufacturing precision
If switching frequency is increased to control critical high aspect ratio features, then etch selectivity and uniformity are improved, but switching loss increases proportionally
Solution Approach 1:
The patent changes the material parameters of the MOSFETs from silicon to wide-bandgap materials (SiC and GaN), which fundamentally alter the switching characteristics and enable high-frequency operation with low switching losses, thus achieving both precise feature control and energy efficiency
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution enhances etch selectivity, uniformity, and throughput by allowing for dynamic control of the Ion Energy Distribution Function (IEDF), while also reducing cooling requirements and providing a more compact and efficient alternative to inductive adder-based pulsers.
Implementation Method 1
a first capacitor connected to the DC voltage source, a first diode in series between the first capacitor and ground, a first resistor connected to the DC voltage source, a first metal oxide semiconductor field effect transistor (MOSFET) in series with the first resistor
Implementation Method 2
a first metal oxide semiconductor field effect transistor (MOSFET) in series with the first resistor, a first gate voltage source connected to a gate of the first MOSFET
Implementation Method 3
RF voltage bias applied to the cathode of a chamber creates an electron-repelling plasma sheath over the substrate surface which acts like a nonlinear diode resulting in a negative cathode potential with respect to positive plasma potential
Implementation Method 4
ions inside the plasma accelerate toward a substrate surface under the influence of a biasing voltage applied to a metal plate known as a cathode
Implementation Method 5
The cathode can be coupled to the plasma using capacitive coupling through a dielectric layer
Implementation Method 6
plasma is traditionally formed using a radio-frequency (RF) source
Data Source
AI summary
Embodiments provided herein generally include apparatus, plasma processing systems, and methods for generation of a waveform for plasma processing of a substrate in a processing chamber. One embodiment includes a waveform generator having three MOSFETs and three series-connected capacitors. The capacitors are connected across a DC power supply and, depending on the value of the capacitors, voltage across each of them may be varied. Each of the top two capacitors is followed by a diode. The bottom capacitor is connected to the ground. The drain terminal of each MOSFET is connected to higher potential end of the series connected capacitors. Each MOSFET is followed by a diode and the cathode ends of the diodes are connected together. An electrode is connected between the common cathode and ground.


