MOSFET Power Switching Circuit for Leak-Safe Memory Programming
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Solution Overview
Problem
Existing power source switching circuits for non-volatile memory devices require stable control of multiple power source voltages, but conventional configurations fail to maintain stable operation when an appropriate power source voltage is not supplied, leading to leakage currents.
Innovation Solution
A power source switching circuit with a series connection of MOSFETs and level shifters, allowing programming of memory cells using either internal or external power sources, with control signals to ensure stable operation and block leakage currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple power source voltages are used for programming non-volatile memory, then programming flexibility and reliability are improved, but circuit complexity increases due to requiring multiple switches and level shifters
Solution Approach 1:
The level shifter circuit is designed to universally support multiple power source voltages (first power source voltage from internal power source and second power source voltage from external power source). The circuit can adaptively operate with either voltage source, making the power supply system multi-functional and flexible without requiring completely separate control circuits for each power source.
Solution Approach 2:
A third power source voltage is introduced as an intermediary stable reference voltage for the level shifter circuits. This intermediary voltage serves as a mediator between the variable first and second power source voltages, providing a stable reference that enables reliable level shifting and MOSFET control regardless of which power source is active, thereby reducing the complexity of voltage coordination.
2Stability of the object's composition
If level shifters are controlled by appropriate power source voltages, then stable voltage control is achieved, but leakage currents occur when appropriate power source voltage is not supplied
Solution Approach 1:
The level shifter circuits are preliminarily configured with multiple power source voltage inputs and control logic that anticipates which power source is available. The control signals are prepared in advance to ensure MOSFETs are properly controlled regardless of power source status, preventing leakage currents before they can occur by establishing proper voltage levels proactively.
Solution Approach 2:
The level shifter circuits incorporate feedback mechanisms that monitor the status of power source voltages and automatically adjust control signals to MOSFETs. When a power source is not supplied or becomes unstable, the feedback system detects this condition and modifies the control signals to prevent leakage currents, thereby maintaining voltage control stability under varying power conditions.
3Device complexity
If only external power source is used for programming, then circuit configuration is simple, but programming flexibility and reliability are limited
Solution Approach 1:
The power source switching circuit is designed with universal compatibility for multiple power sources. The level shifter circuits can operate with first power source voltage from internal power source, second power source voltage from external power source, or combinations thereof. This multi-functionality provides programming flexibility and reliability while maintaining a unified circuit configuration that doesn't require completely different designs for different power source scenarios.
Data Source
AI summary
A power source switching circuit for a memory device includes: a first power source voltage terminal for supplying a first power source voltage, a second power source voltage terminal for supplying a second power source voltage, a first metal-oxide-semiconductor field-effect transistor (MOSFET) and a second MOSFET connected in series with the first power source voltage terminal, a first level shifter connected to the first MOSFET and supplied with the first power source voltage, a second level shifter connected to the second MOSFET and supplied with the second power source voltage, a third MOSFET connected to the second MOSFET, and a third level shifter connected to the third MOSFET and supplied with a third power source voltage, and a memory cell of a non-volatile memory is programmed using the first power source voltage or the second power source voltage.