MOSFET Contact and Gate Protrusions for Short-Margin Scaling
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Solution Overview
Problem
The scale-down of metal-oxide-semiconductor field-effect transistors (MOSFETs) in semiconductor devices leads to operational challenges such as reduced short margin due to closely placed conductive components, necessitating improved design to enhance performance and reduce process failures.
Innovation Solution
The semiconductor device incorporates specific structural features including active and gate electrodes with protruding portions, spacers with varying top surfaces, and interconnection lines, along with a method of fabrication that forms these elements using mask patterns to create contact and electrode protrusions, enhancing electrical characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If MOSFETs are scaled down to meet increasing demand for smaller pattern size and higher performance, then device integration density is improved, but operational properties deteriorate due to reduced short margin between closely placed conductive components
Solution Approach 1:
The patent introduces protruding portions that extend vertically from the gate electrode and active contact surfaces, utilizing the third dimension (height) to achieve electrical connection. This dimensional transition allows conductive components to maintain sufficient horizontal spacing while establishing vertical electrical pathways, thereby resolving the contradiction between high integration density and reliable operation.
Solution Approach 2:
The protruding portions act as intermediary structures between the gate electrode and lower interconnection lines, and between the active contact and lower interconnection lines. These protrusions provide dedicated electrical pathways that mediate the connection requirements, enabling closely placed components to maintain both proximity for high density and sufficient electrical isolation for reliable operation.
2Area of stationary object
If conductive components are closely placed to achieve smaller pattern size, then area is reduced, but short margin is reduced leading to process failures
Solution Approach 1:
By transitioning from two-dimensional planar connections to three-dimensional vertical connections through protruding portions, the patent enables smaller device area while maintaining adequate short margin. The vertical protrusions establish electrical pathways without requiring increased horizontal spacing between conductive components.
Solution Approach 2:
The gate electrode and active contact are segmented into distinct portions: a main body portion and a protruding portion. This segmentation allows the main bodies to be closely placed for small device area while the protruding portions extend vertically to establish electrical connections, effectively separating the spatial arrangement from the electrical connection requirements.
3Reliability
If protruding portions are formed on gate electrode and active contact to enhance electrical characteristics, then electrical performance is improved, but structural complexity increases
Solution Approach 1:
The protruding portions are formed through self-aligned processes where the mask patterns automatically define the protrusion geometries during standard lithography and etching steps. This self-service approach enhances electrical characteristics without requiring additional specialized processing equipment or complex manufacturing steps.
Solution Approach 2:
The formation of protruding portions is merged with existing fabrication steps for gate electrode and active contact formation. The same mask patterns and etching processes that define the gate and contact geometries also create the protruding portions, combining multiple functions into unified processing steps and avoiding additional complexity.
Data Source
AI summary
A semiconductor device includes an active pattern on a substrate, a source/drain pattern on the active pattern, a gate electrode on a channel pattern connected to the source/drain pattern, an active contact on the source/drain pattern, a first lower interconnection line on the active contact, a second lower interconnection line on the gate electrode, a first spacer between the gate electrode and the active contact, and a second spacer between the first spacer and the gate electrode or the active contact. The gate electrode includes an electrode body portion and an electrode protruding portion protruding from a top surface thereof and contacting the second lower interconnection line. The active contact includes a contact body portion and a contact protruding portion protruding from a top surface thereof and contacting the first lower interconnection line. A top surface of the first spacer is higher than a top surface of the second spacer.