MOSFET Voltage Regulation Circuit With PTAT-CTAT Reference
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Solution Overview
Problem
Existing voltage regulation circuits in GaN technology face challenges in providing a stable voltage reference with low temperature drift and line sensitivity, due to limitations in available components and complex circuit designs, especially when p-n junctions cannot be exploited.
Innovation Solution
A voltage regulation circuit with a voltage reference circuit configured to supply an independent reference voltage, utilizing a first circuit branch with a current generator comprising a PTAT depletion MOSFET transistor and a CTAT enhancement MOSFET transistor, coupled in a control node, and an output stage with a resistive voltage divider for negative feedback, achieving low temperature and line sensitivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If external references such as Zener Diodes are used to provide voltage reference, then voltage regulation is achieved, but frequency operation is limited due to parasitic components and large temperature drifts occur
Solution Approach 1:
The patent changes the fundamental parameters of the voltage reference by using a bandgap reference circuit that generates a temperature-compensated voltage. The circuit combines a PTAT (proportional to absolute temperature) voltage from a bipolar transistor with a CTAT (complementary to absolute temperature) voltage to create a reference voltage with zero temperature coefficient, thereby eliminating temperature drift while maintaining frequency operation capability
Solution Approach 2:
The patent introduces an intermediary bandgap reference circuit between the power supply and the LNA. This intermediary circuit converts the unstable voltage references (Zener diodes or simple voltage dividers) into a stable, temperature-compensated reference voltage, mediating the temperature and frequency variations to maintain reliable voltage regulation
2Device complexity
If internal references are created using GaN components such as Schottky Diodes and Si-Cr Resistors, then integration is improved, but creating a voltage reference with low temperature drift and low line sensitivity becomes complex
Solution Approach 1:
The patent makes the voltage reference circuit universal by designing it to work with standard GaN HEMT processes without requiring exotic components. The bandgap reference uses only standard bipolar transistors, resistors, and capacitors that are compatible with GaN CMOS integration, achieving both high integration and stable voltage reference performance simultaneously
Solution Approach 2:
The patent segments the voltage reference generation into distinct functional blocks: a PTAT voltage generation section using bipolar transistors, a CTAT voltage section, and a summation network. This segmentation allows each block to be optimized independently while maintaining overall stability, reducing the complexity of creating a low-drift reference using only GaN components
3Ease of operation
If separate circuit blocks are used for voltage reference and voltage regulation, then functional separation is achieved, but current consumption increases and circuit complexity increases
Solution Approach 1:
The patent merges the voltage reference generation and voltage regulation functions into a single integrated circuit block. The bandgap reference circuit directly provides the reference voltage to the regulation loop, eliminating the need for separate reference and regulation blocks. This integration reduces current consumption by sharing common components and reduces overall circuit complexity while maintaining functional separation through internal circuit architecture
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a voltage regulation circuit with low line sensitivity and temperature spread, suitable for GaN technology, reducing power consumption and area requirements while maintaining stability.
Implementation Method 1
a first depletion MOSFET transistor, QD2, which gate source voltage is a PTAT (Proportional To Absolute Temperature) voltage
Implementation Method 2
a first enhancement MOSFET transistor, QE2, which gate source voltage is a CTAT (Complementary To Absolute Temperature) voltage
Implementation Method 3
a source resistor, R5, on which a reference voltage, VP, sum of the PTAT voltage drop, VP, on the source resistor, R5
Implementation Method 4
a resistive voltage divider, 40, being coupled to said output node, outputting on a respective divider output node, A, a divided output regulated voltage which is inputted as the process variable of a negative feedback loop
Data Source
AI summary
The present disclosure is directed to a voltage regulation circuit receiving as input an input voltage, in particular a DC voltage supply, and outputting a regulated voltage. The voltage regulation circuit includes a voltage reference circuit configured to supply a reference voltage which is independent, in particular with respect to temperature variations. The voltage regulation circuit includes a first circuit branch and a second circuit branch in parallel coupled between the input voltage and ground. The first branch includes a current generator including a first depletion MOSFET transistor, which gate source voltage is a PTAT (Proportional To Absolute Temperature) voltage, coupled between the input voltage and the voltage reference circuit. The voltage reference circuit includes a first enhancement MOSFET transistor, which gate source voltage is a CTAT (Complementary To Absolute Temperature) voltage, coupled to the ground by its source through a source resistor, on which a reference voltage, sum of the PTAT voltage drop on the source resistor and of the gate source voltage of the enhancement MOSFET transistor being formed. The first enhancement MOSFET transistor is arranged on the first branch and coupled by the drain to the first depletion MOSFET transistor in a control node. The control node is coupled to the gate of the first enhancement MOSFET transistor. The first depletion MOSFET transistor injects a PTAT current in the first branch determining a PTAT voltage drop on the source resistor. The second branch includes an output stage coupled between the voltage to regulate and an output node on which the regulated voltage is taken. The output stage includes a second depletion MOSFET transistor on which output is taken at the output node. A resistive voltage divider is coupled to the output node, outputting on a respective divider output node a divided output regulated voltage which is inputted as the process variable of a negative feedback loop which is also coupled to the reference voltage. The output of the negative feedback loop controls the gate of the second MOSFET transistor.