MOSFET Protection Circuit for Reverse Polarity Overcurrent Blocking

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Solution Overview

Problem

Existing protection circuits for integrated circuits face challenges in managing excessive current due to reverse polarity supply voltages, particularly in in-vehicle electronic devices where high gate withstand voltages are required to prevent overcurrents.

Innovation Solution

A protection circuit design utilizing p-type field effect transistors (FETs) with gate drives that adjust voltages to ensure parasitic diodes are in an off state, regardless of supply voltage polarity, reducing the gate withstand voltage and preventing overcurrents.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a protection circuit uses p-type MOSFETs with bulk connected to a higher voltage terminal to keep parasitic diodes off, then overcurrent prevention is improved, but the gate withstand voltage requirement increases

Engineering Contradiction:
Improveovercurrent preventionVSAvoidgate withstand voltage
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The protection circuit is divided into multiple p-type MOSFETs (first, second, and third transistors) with distinct functions: the first and second transistors control current paths from supply and ground terminals respectively, while the third transistor acts as a main protection switch. This segmentation allows each transistor to operate within lower voltage stress while collectively providing robust overcurrent protection.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a new control dimension by connecting the bulk of each transistor to a common node rather than directly to supply or ground terminals. This dimensional change in voltage reference allows the parasitic diodes to remain reverse-biased through a different voltage distribution mechanism, reducing the gate-source voltage stress while maintaining protection functionality.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If the bulk voltage is kept at the higher of supply or ground voltage to reverse bias parasitic diodes, then protection against reverse polarity is improved, but the voltage stress on transistor gates increases

Engineering Contradiction:
Improvereverse polarity protectionVSAvoidvoltage stress on gates
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A common node is introduced as an intermediary voltage reference point to which the bulks of all p-type MOSFETs are connected. This intermediary structure mediates the voltage distribution such that the parasitic diodes remain reverse-biased during reverse polarity conditions without subjecting the gate terminals to excessive voltage stress, as the bulk voltage is decoupled from direct connection to supply or ground terminals.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If high gate withstand voltage transistors are used to handle potential reverse voltage, then protection capability is improved, but device complexity and cost increase

Engineering Contradiction:
Improveprotection capabilityVSAvoidtransistor specification requirements
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the voltage parameters in the protection circuit by using a common node voltage reference system instead of direct supply/ground connections. This parameter change allows standard p-type MOSFETs with lower gate withstand voltage ratings to be used, as the voltage distribution is optimized to keep gate-source and gate-drain voltages within safe operating limits while maintaining effective reverse polarity protection.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively prevents overcurrents by ensuring parasitic diodes are in an off state, reducing the gate withstand voltage requirements and enhancing the reliability of the circuit, even under abnormal voltage conditions.

Implementation Method 1

a first transistor (M1) including a gate (G1) and a bulk (NB1), and being a p-type field effect transistor (FET)

Methodology Applied
Scientific EffectField effect: Electric Field

Implementation Method 2

a parasitic diode that is formed between the bulk (N well) of each of the transistors M11 to M13 and a P-type region (P well or the like) in contact with the bulk

Methodology Applied
Scientific EffectDiode rectification: Diode

Data Source

PatentUS20230361109A1Protection circuit and semiconductor integrated circuit device
Publication Date: 2023.11.09 ALPS ALPINE CO LTD
  • US20230361109A1 patent drawing
  • US20230361109A1 patent drawing
  • US20230361109A1 patent drawing

AI summary

A first gate drive outputs a first drive voltage to turn a first transistor on upon occurrence of a condition in which a voltage at a supply terminal is higher than a voltage at a ground terminal, the output first drive voltage being higher than the voltage at the ground terminal. A second gate drive outputs a second drive voltage to turn a second transistor on, upon occurrence of a condition in which the voltage at the supply terminal is lower than the voltage at the ground terminal, the output second drive voltage being higher than the voltage at the supply terminal.