MOSFET/SKY One-Time Top-Contact Trench Etching
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Solution Overview
Problem
The manufacturing process of MOSFET devices integrated with Schottky Diodes typically requires multiple contact etching steps, leading to substantial trench geometrical tolerances and complicating the process, resulting in inconsistent device performance.
Innovation Solution
A simplified one-time top-contact trench etching method is developed, which involves forming gate trenches, source regions, and active region contact trenches in a MOSFET device, using a single etching process to create a MOSFET/SKY device with integrated Schottky diode, reducing the complexity and variability in trench geometries.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple contact etching steps are used to form gate trenches and source body contact trenches, then the manufacturing process can accommodate complex device structures, but the trench geometrical tolerances increase substantially and device performance consistency deteriorates
Solution Approach 1:
The patent combines multiple contact etching steps into a single etching process that simultaneously forms both the gate trench and the source body contact trench. This merging of operations eliminates the compounding of geometrical tolerances that occurs when multiple separate etching steps are performed, while still achieving the complex trench structures required for the MOSFET/SKY device architecture.
Solution Approach 2:
The single contact etching process is designed to perform multiple functions: it creates both the gate trench and the source body contact trench in one operation. This multi-functional approach maintains the ability to form complex device structures while avoiding the precision degradation associated with sequential etching steps.
2Adaptability or versatility
If multiple contact etching steps are performed, then different trench geometries can be created, but the manufacturing process complexity increases
Solution Approach 1:
The patent merges multiple etching operations into a single contact etching step that simultaneously creates both the gate trench and the source body contact trench. This consolidation reduces manufacturing process complexity while maintaining the geometric versatility needed to form different trench structures with appropriate dimensions and orientations.
Solution Approach 2:
The single contact etching process is carefully designed in advance to account for the different geometry requirements of both trenches. By pre-planning the etching parameters, mask patterns, and process conditions, the method achieves diverse trench geometries without requiring multiple separate etching steps, thereby simplifying the overall manufacturing process.
3Manufacturing precision
If multiple contact etching steps are used, then specific trench configurations can be achieved, but the manufacturing time and process steps increase
Solution Approach 1:
The patent combines the formation of gate trenches and source body contact trenches into a single contact etching operation. This merging maintains the ability to achieve precise trench configurations through carefully controlled etching parameters while simultaneously improving manufacturing throughput by eliminating redundant process steps and reducing the total manufacturing time.
Data Source
AI summary
Method for fabricating MOSFET integrated with Schottky diode (MOSFET/SKY) is disclosed. Gate trench is formed in an epitaxial layer overlaying semiconductor substrate, gate material is deposited therein. Body, source, dielectric regions are successively formed upon epitaxial layer and the gate trench. Top contact trench (TCT) is etched with vertical side walls defining Schottky diode cross-sectional width SDCW through dielectric and source region defining source-contact depth (SCD); and partially into body region by total body-contact depth (TBCD). A heavily-doped embedded body implant region (EBIR) of body-contact depth (BCD)<TBCD is created into side walls of TCT and beneath SCD. An embedded Shannon implant region (ESIR) is created into sub-contact trench zone (SCTZ) beneath TCT floor. A metal layer is formed in contact with ESIR, body and source region. The metal layer also fills TCT and covers dielectric region thus completing the MOSFET/SKY with only one-time etching of its TCT.