MOSFET Voltage Multiplexer Without Auxiliary Bias Circuits
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Solution Overview
Problem
Existing voltage signal multiplexers require an auxiliary voltage, increasing memory complexity and space occupation due to the need for additional circuits for voltage distribution and complex algorithms in microcontrollers or finite state machines.
Innovation Solution
A voltage signal multiplexer design that eliminates the need for an auxiliary voltage by using a control and bias stage to generate bulk bias signals for MOSFET transistors, allowing selection between high-voltage signals without direct biasing pn-junctions, thereby reducing noise emission and simplifying circuitry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If an auxiliary voltage is used in the multiplexer, then the selection between high-voltage signals can be achieved, but the memory complexity and space occupation increase due to additional voltage distribution circuits
Solution Approach 1:
The patent extracts and eliminates the auxiliary voltage generator and its distribution circuits from the memory system. Instead, it uses the existing high-voltage signals themselves (V1, V2, etc.) directly to control the bulk terminals of MOSFETs in the switching stage, thereby achieving signal selection without the complexity of auxiliary voltage generation and distribution infrastructure
Solution Approach 2:
The high-voltage signals serve dual functions: they are both the signals to be multiplexed (input signals to the multiplexer) and the control signals for selecting which input signal passes through. By using the same high-voltage signals for both data transmission and selection control, the patent eliminates the need for separate auxiliary voltage circuits
2Adaptability or versatility
If an auxiliary voltage is used in the multiplexer, then the selection between high-voltage signals can be achieved, but the occupation of memory space increases due to additional circuits
Solution Approach 1:
The patent removes the auxiliary voltage generator and distribution networks from the memory architecture, thereby freeing up the silicon area that would have been occupied by these circuits. The design achieves signal selection functionality using only the essential high-voltage signal paths and MOSFET switching elements
3Ease of operation
If direct biasing of pn-junctions is applied, then the switching operation can be simplified, but noise emission increases
Solution Approach 1:
The patent applies different biasing conditions to different regions of the MOSFET structure. Specifically, the bulk terminal is biased to the same potential as the source terminal (rather than directly to ground or a fixed voltage), which locally adjusts the electric field distribution in the pn-junction regions to prevent direct biasing and reduce noise generation while maintaining proper switching operation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design reduces memory complexity and space occupation by eliminating the need for auxiliary voltage circuits and simplifying algorithms, while effectively selecting between high-voltage signals without increasing noise emission.
Implementation Method 1
The switching stage (110) comprises at least one MOSFET transistor and is such to receive a bulk bias signal (NBULK) generated by the control and bias stage (20)
Implementation Method 2
avoiding the direct bias between the pn-junctions upon the variation of the values of the first and of the second input voltage signal V1, V2
Data Source
AI summary
A voltage signal multiplexer includes a control and bias stage to generate at least one control and bias signal as a function of first and second selection signals and first and second input voltage signals. The multiplexer further comprises a switching stage configured to receive the at least one first control and bias signal and to generate therefrom, on an output terminal, an output signal having the first input voltage signal in response to the first and the second selection signals indicating the selection of the first input voltage signal, and having the second input voltage signal in response to the first and the second selection signals indicating the selection of the second input voltage signal. The switching stage is also configured to place the output terminal in a high-impedance condition in response to the first and the second selection signals indicating the high-impedance condition.