Mounting Table Dielectric Layer for Uniform Plasma Etching

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Solution Overview

Problem

In plasma processing for semiconductor manufacturing, high-frequency power leads to non-uniform electric field distribution and electron density, causing variations in etching rates and potential damage to gate oxide films due to uneven current flow and charge-up.

Innovation Solution

A mounting table with a dielectric layer embedded in the central portion of the lower electrode and an electrostatic chuck connected to a high voltage DC power supply, featuring an electrode film with specific resistivity conditions (δ/z ≥ 85 and surface resistivity of the substrate greater than the central portion of the electrode film) to ensure uniform electric field distribution and prevent charge-up damage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If high frequency power is applied to generate plasma, then plasma generation is achieved, but non-uniform electric field distribution occurs causing non-uniform electron density and etching rate variations

Engineering Contradiction:
Improveplasma generation capabilityVSAvoidetching rate uniformity
Core Design Contradiction:
PowerVSManufacturing precision

Solution Approach 1:

The patent applies local quality by embedding a dielectric layer specifically at the central portion of the lower electrode surface. This creates a localized modification where the central region has different electrical properties (dielectric constant) compared to the peripheral regions, thereby redistributing the electric field to achieve uniform electron density and etching rates across the wafer surface.

Inventive Principle:
Principle #3Local quality

2Power

If high frequency power is applied between electrodes, then plasma is generated, but electric field strengthens at center and weakens at periphery causing non-uniform processing

Engineering Contradiction:
Improveplasma generation efficiencyVSAvoidelectric field distribution uniformity
Core Design Contradiction:
PowerVSStability of the object's composition

Solution Approach 1:

The dielectric layer is embedded only at the central portion of the lower electrode, creating a localized property change. This local modification alters the electric field distribution by introducing a region with different permittivity, which redistributes the field lines to achieve more uniform field strength across the entire electrode surface.

Inventive Principle:
Principle #3Local quality

3Strength

If electrostatic chuck is used to firmly mount wafer, then wafer fixation is achieved, but high frequency current may charge up gate oxide film causing deterioration

Engineering Contradiction:
Improvewafer fixation strengthVSAvoidgate oxide film charge-up damage
Core Design Contradiction:
StrengthVSObject-affected harmful factors

Solution Approach 1:

The dielectric layer acts as an intermediary between the lower electrode and the wafer. It provides a controlled electrical interface that allows the electrostatic chuck to firmly hold the wafer while simultaneously preventing harmful high frequency current from charging the gate oxide film, thus mediating between fixation requirements and film protection.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution achieves uniform etching rates and prevents deterioration of gate oxide films by ensuring uniform plasma electron density and controlled current flow, maintaining the integrity of semiconductor devices.

Implementation Method 1

a hollow cylindrical resonance of TM mode is generated at the central portion of the lower electrode 81

Methodology Applied
Scientific EffectResonance: Resonance

Implementation Method 2

the electric field strength can be lowered at a space above the central portion of the wafer W, to thereby make the electric field strength uniformly distributed

Methodology Applied
Scientific EffectElectric Field: Electric Field

Implementation Method 3

high voltage DC power is supplied from a high voltage DC power supply 86 to the electrode film 85 to generate a coulomb force on a surface of the upper member of the electrostatic chuck 84, whereby the wafer W is electrostatically adsorbed and fixed

Methodology Applied
Scientific EffectCoulomb force: Coulomb's Law

Implementation Method 4

an electrode film satisfying the following conditions: δ/z≧85 and, a surface resistivity of the substrate>a surface resistivity of a central portion of the electrode film

Methodology Applied
Scientific EffectElectrical Resistance: Electrical Resistance

Implementation Method 5

a high frequency current flows along a surface of the lower electrode 81 to an upper part thereof by the skin effect

Methodology Applied
Scientific EffectSkin Effect: Skin Effect

Data Source

PatentUS8512511B2Mounting table and plasma processing apparatus
Publication Date: 2013.08.20 TOKYO ELECTRON LTD
  • US8512511B2 patent drawing
  • US8512511B2 patent drawing
  • US8512511B2 patent drawing

AI summary

A mounting table for use in a plasma processing apparatus, on which a substrate is mounted, includes: a conductive member connected to a high frequency power supply and a high frequency power supply; a dielectric layer embedded in a central portion on an upper surface of the conductive member; and an electrostatic chuck mounted on the dielectric layer. Further, the electrostatic chuck is connected to a high voltage DC power supply and includes an electrode film satisfying following conditions: δ/z≧85 (where δ=(ρv/(μπf))1/2) and, a surface resistivity of the substrate>a surface resistivity of a central portion of the electrode film.