Bidirectional MRAM Read Circuit for Lower-Energy Dual Sensing
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Solution Overview
Problem
Magnetic Random-Access Memory (MRAM) devices consume significant energy during read operations, which is a disadvantage despite their advantages in memory cell size and scalability.
Innovation Solution
A memory circuit design that includes a charge voltage select unit to charge and discharge data lines with reference voltages, using a bidirectional sense amplifier to sense the resistive state of memory cells during both charging and discharging phases, reducing energy consumption by 40% compared to traditional methods that only discharge during read operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If traditional read operation is used in MRAM, then the memory cell size and scalability are improved, but the energy consumption increases significantly
Solution Approach 1:
The patent applies preliminary action by performing a sense operation during the charging phase before the discharging phase. The bidirectional sense amplifier detects the resistive state of the selected memory cell while the bit line is being charged, allowing the read operation to complete during the charging phase without waiting for discharge. This preliminary sensing action reduces the total time the read operation must wait, thereby reducing energy consumption while maintaining read efficiency
Solution Approach 2:
The patent implements continuity of useful action by utilizing both the charging and discharging phases for productive purposes. During charging, the bidirectional sense amplifier performs the sense operation to read the memory cell state. During discharging, the same amplifier prepares for or performs additional sensing operations. This continuous utilization of both phases for useful work eliminates idle time and reduces overall energy consumption while maintaining high read operation throughput
2Use of energy by moving object
If bidirectional sense amplifier is used to sense during both charging and discharging, then energy consumption is reduced by 40%, but device complexity increases
Solution Approach 1:
The patent applies universality by designing a bidirectional sense amplifier that can operate in both charging and discharging modes using the same hardware circuitry. The sense amplifier is configured to perform sensing operations regardless of whether the bit line is charging or discharging, making it a multi-functional component. This eliminates the need for separate sense amplifiers or additional control circuits for different phases, thereby reducing overall device complexity while achieving energy savings through continuous useful action
Solution Approach 2:
The patent utilizes parameter changes by dynamically adjusting the operational parameters of the bidirectional sense amplifier based on the phase (charging or discharging). The amplifier's reference voltages, gain, and switching timing are optimized for each phase to maintain sensing accuracy. By adapting parameters rather than adding hardware, the patent achieves efficient sensing during both phases without significantly increasing device complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed method significantly reduces energy consumption by 40% during read operations in MRAM devices by sensing bit states during both charging and discharging phases, enhancing energy efficiency.
Implementation Method 1
sense amplifier to sense the resistive state of selected memory cells during both charging and discharging
Data Source
AI summary
A memory circuit includes a memory cell array, a data line selectively coupled to memory cells of the memory cell array, a dummy cell coupled to a reference line, and a comparator coupled to the data line and the reference line. The memory circuit, during a first read operation, charges the data line through a first selected memory cell of the memory cell array and charges the reference line through the dummy cell, during a second read operation, discharges the data line through a second selected memory cell of the memory cell array and discharges the reference line through the dummy cell, and during each of the first and second read operations, outputs a voltage from the comparator having one of a low or high voltage level based on a difference between a data line voltage on the data line and a reference voltage on the reference line.