MRAM Gate Electrode Shielding Integration Density
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Solution Overview
Problem
Conventional MRAM manufacturing methods face challenges in increasing integration density due to insufficient magnetic shielding and increased interconnections, leading to higher risks of malfunctions and magnetic interference between memory cells.
Innovation Solution
A semiconductor memory device and manufacturing method that includes a spin-injection magnetization-reversal element deposited on a second impurity layer with a gate electrode surrounding the channel layer, a bit line on the magnetization-reversal element, and a word line electrically connected to the gate electrode, reducing magnetic interference and eliminating the need for additional interconnections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If both sides of an impurity deposition are coated with a gate deposition to increase integration density, then the degree of integration in MRAM is improved, but the shielding effectiveness of flux generated by current through the impurity deposition becomes insufficient, leading to increased magnetic interference between memory cells
Solution Approach 1:
The patent implements a nested shielding structure where a first gate deposition is formed on the impurity deposition, a second gate deposition is formed on the first gate deposition, and a third gate deposition is formed on the second gate deposition. This nested configuration creates multiple layers of magnetic shielding, where each layer contributes to flux shielding, thereby maintaining high integration density while effectively reducing magnetic interference between adjacent memory cells through cumulative shielding effectiveness.
2Object-affected harmful factors
If a writing word line is arranged over the bit line separately from the gate deposition to improve magnetic shielding, then shielding effectiveness is improved, but the number of interconnections increases, which hinders an increase in the degree of integration
Solution Approach 1:
The patent makes the gate deposition serve multiple functions: it acts as both the control electrode for the transistor and as a magnetic shielding structure. By forming multiple gate depositions (first, second, and third) on the impurity deposition, the gate structure simultaneously provides electrical control and magnetic flux shielding, eliminating the need for separate writing word lines and thereby maintaining low interconnection complexity while achieving effective magnetic shielding.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances shielding effectiveness, allows for closer memory cell placement without malfunctions, and increases integration density in MRAM devices by reducing current consumption and eliminating the need for external magnetic fields.
Implementation Method 1
a spin-injection magnetization-reversal element deposited on the second impurity layer
Data Source
AI summary
A channel layer is deposited on a first impurity layer, a second impurity layer is deposited on the channel layer, a gate electrode is placed to surround a circumference of the channel layer with a gate insulating film interposed therebetween, a spin-injection magnetization-reversal element is deposited on the second impurity layer, a bit line is placed on the spin-injection magnetization-reversal element, and a word line is placed on the bit line to be electrically connected to the gate electrode.