Multiple Hard Mask Patterning for Sub-20nm MRAM Fabrication

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Solution Overview

Problem

Current methods for fabricating magnetoresistive random-access memory (MRAM) devices require complex and expensive photolithography systems to achieve sub-nano node product sizes, as the MTJ cell size is determined by the photoresist pattern size, necessitating a simpler and cost-effective alternative for forming smaller MTJ structures.

Innovation Solution

A method involving multiple hard masks with optimized plasma etch conditions is used to gradually reduce the pattern size from approximately 80 nm photoresist to 20 nm or below MTJ device size, utilizing a stack of metal and dielectric hard masks with selective etch properties, allowing for isotropic etching and high pattern integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If traditional photolithography methods are used to define MTJ cells, then the MTJ cell size is determined by the photoresist pattern size, but achieving sub-nano node product sizes requires complex and expensive immersion deep ultraviolet (DUV) and extreme ultraviolet (EUV) photolithography systems

Engineering Contradiction:
ImproveMTJ cell sizeVSAvoidphotolithography system complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent divides the single photolithography patterning step into multiple sequential hard mask patterning steps. Each hard mask layer (first, second, third hard masks) performs a portion of the pattern transfer, progressively defining the MTJ cell dimensions. This segmentation allows achieving sub-20nm MTJ cell sizes using simpler 193nm DUV photolithography instead of complex EUV systems.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces vertical layering of multiple hard masks stacked above the MTJ stack, adding a vertical dimension to the patterning process. This multi-layer hard mask structure enables precise lateral pattern definition through selective etching of each layer, achieving high precision without requiring advanced optical systems.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Manufacturing precision

If multiple hard masks are used to reduce MTJ device size, then the MTJ pattern size can be reduced below the initial photoresist pattern size, but additional processing steps are required

Engineering Contradiction:
ImproveMTJ pattern sizeVSAvoidprocessing steps
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent combines multiple patterning functions into a single integrated process flow where three hard masks are deposited and etched in sequence without requiring separate lithography exposures. The hard masks are combined in a stack structure, and their collective pattern transfer achieves the final sub-20nm MTJ dimension, merging what would otherwise be multiple independent patterning operations.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent utilizes etch selectivity parameter differences between various hard mask materials and the underlying MTJ layers to enable selective removal of each hard mask layer. By controlling etch chemistry and parameters, each hard mask can be selectively etched while preserving others, allowing progressive pattern refinement without affecting previously defined features.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the fabrication of sub-20 nm MTJ devices with improved uniformity and reduced costs compared to traditional methods, using a series of plasma etch steps with specific gas mixtures and power settings to achieve smaller MTJ sizes without requiring high-cost, complex exposure systems.

Implementation Method 1

optimized plasma etch conditions is used to gradually reduce the pattern size

Methodology Applied
Scientific EffectPlasma etching: Plasma

Implementation Method 2

each successive dielectric hard mask has etch selectivity with respect to its underlying and overlying layers

Methodology Applied
Scientific EffectSelective etching:

Data Source

PatentUS10868244B2Multiple hard mask patterning to fabricate 20nm and below MRAM devices
Publication Date: 2020.12.15 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10868244B2 patent drawing
  • US10868244B2 patent drawing
  • US10868244B2 patent drawing

AI summary

A method for etching a magnetic tunneling junction (MTJ) structure is described. A stack of MTJ layers on a bottom electrode on a wafer is provided. A metal hard mask layer is provided on the MTJ stack. A stack of multiple dielectric hard masks is formed on the metal hard mask wherein each successive dielectric hard mask has etch selectivity with respect to its underlying and overlying layers. The dielectric hard mask layers are etched in turn selectively with respect to their underlying and overlying layers wherein each successive pattern size is smaller than the preceding pattern size. The MTJ stack is etched selectively with respect to the bottommost combination dielectric and metal hard mask pattern to form a MTJ device having a MTJ pattern size smaller than a bottommost pattern size.