MRAM Logic Gate Module for Reprogrammable IP Protection
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Solution Overview
Problem
Current logic gates based on CMOS technology are non-reprogrammable and pose risks due to the need for confidential graphic data systems, as they can be de-processed and reverse engineered, compromising intellectual property protection.
Innovation Solution
A logic gate module utilizing a magnetic tunnel junction with a sense layer and a storage layer, where the storage magnetization is switchable between multiple directions to store data, allowing for reprogrammability and the use of a comparator to output digital signals for performing logic functions, reducing the risk of IP theft by making the GDS file non-confidential.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If CMOS technology is used for logic gates, then the technology is mature and widely adopted, but the gates cannot be reprogrammed and are vulnerable to reverse engineering
Solution Approach 1:
The patent changes the physical parameter of magnetization direction in MRAM cells to enable multiple logic states (0, 1, X) and reprogrammability. By controlling the orientation of magnetization vectors through applied magnetic fields, the system achieves configurable logic functionality that can be changed without physical redesign, resolving the contradiction between adaptability and reliability.
Solution Approach 2:
The patent replaces the electrical field-based CMOS technology with a magnetic field-based MRAM system. This substitution uses magnetic moments and spin-dependent transport mechanisms instead of conventional charge-based switching, enabling non-volatile, reprogrammable logic gates that are resistant to reverse engineering while maintaining logical functionality.
2Reliability
If GDS file confidentiality is maintained to protect IP, then IP protection is improved, but the risk of de-processing and reverse engineering remains
Solution Approach 1:
By substituting CMOS with MRAM-based magnetic logic, the patent creates a system where the logic functionality is determined by magnetic field configurations rather than fixed circuit layouts. This makes reverse engineering ineffective because the logical behavior cannot be easily deduced from physical structure, as the same physical structure can be reconfigured to perform different logical functions through magnetic field application.
Solution Approach 2:
The patent introduces dynamic reconfigurability through time-varying magnetic fields that can change the logic state of MRAM cells during operation. This dynamic behavior means the system's logical function is not static but can be modified in real-time, preventing reverse engineering attempts from capturing a complete picture of the intellectual property.
3Adaptability or versatility
If MRAM cell is used with multiple magnetization directions, then reprogrammability and logic states increase, but device complexity increases
Solution Approach 1:
The patent makes the MRAM cell structure universal by designing it to handle multiple magnetization directions (0°, 90°, 180°, 270°) with the same physical configuration. The same MRAM cell can perform different logic functions (AND, OR, NAND, NOR, XOR, XNOR) by simply changing the magnetic field application sequence, eliminating the need for different hardware structures for different logic states and reducing overall device complexity.
Solution Approach 2:
The patent uses periodic magnetic field pulses with specific timing and polarity to control magnetization switching in a systematic manner. By applying sequences of write pulses with defined characteristics, the complex task of controlling multiple magnetization directions is simplified into a repeatable, periodic control scheme that can be managed through standardized pulse sequences rather than complex continuous control.
4Productivity
If logic gate module is made reprogrammable, then area/performance ratio improves, but manufacturing complexity increases
Solution Approach 1:
The patent designs a universal MRAM-based logic gate module that can be manufactured once and then reprogrammed for different logic functions through magnetic field control. This single structure serves multiple purposes, eliminating the need to manufacture separate circuits for each logic function, thereby improving area utilization and performance while keeping manufacturing processes simple and standardized.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The logic gate module is reprogrammable, increasing the area/performance ratio and eliminating the risk of copying, while being 'normally off' to prevent leakage when not in use, thus enhancing security and efficiency.
Implementation Method 1
a magnetic tunnel junction comprising a sense layer having a sense magnetization, a storage layer having a storage magnetization, and a spacer layer between the sense and the storage layers, the MRAM cell having a junction resistance determined by the degree of alignment between the sense magnetization and the storage magnetization
Implementation Method 2
a comparator for comparing the junction resistance with a reference value and outputting a digital signal indicating a difference between the junction resistance (RMTJ) and the reference value
Data Source
AI summary
A logic gate module for performing logic functions including a MRAM cell including a magnetic tunnel junction comprising a sense layer, a storage layer, and a spacer layer. The MRAM cell has a junction resistance determined by the degree of alignment between a sense magnetization of the sense layer and the storage magnetization of the storage layer. The storage magnetization and the sense magnetization are switchable between m directions to store data corresponding to one of m logic states, with m>2, such that the MRAM cell is usable as a n-bit cell with n≥2. The logic gate module further includes a comparator for comparing the junction resistance with a reference value and outputting a digital signal indicating a difference between the junction resistance and the reference value, such that logic functions can be performed.