MRAM Read Circuit Area Reduction via Single Reference Cell

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Solution Overview

Problem

The existing magnetoresistive random access memory (MRAM) read circuit configuration requires multiple reference cells and operational amplifiers, leading to increased area occupation and power consumption due to the need for clamp circuits and multiple read circuits per memory chip.

Innovation Solution

A magnetoresistive random access memory design that uses a single reference cell with a MOSFET and a sense amplifier to generate a reference current between low and high resistance states, eliminating the need for operational amplifiers and reducing the number of read circuits required.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If multiple reference cells are used to generate reference signal, then reading accuracy is improved, but the number of reference cells increases and memory cell share decreases

Engineering Contradiction:
Improvereading accuracyVSAvoidnumber of reference cells
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent combines multiple reference cells into a single reference cell by using a current mirror circuit that replicates the current from one reference cell to multiple read circuits. This allows one reference cell to serve multiple memory cell blocks simultaneously, reducing the total number of reference cells while maintaining reading accuracy through current mirroring.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The single reference cell is designed to serve multiple functions by providing reference current to multiple read circuits through the current mirror mechanism. This multi-functional approach allows one reference cell to support reading operations across multiple memory cell blocks, eliminating the need for separate reference cells for each block.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If clamp circuit with operational amplifiers is used for every read circuit, then reading reliability is improved, but area occupation increases

Engineering Contradiction:
Improvereading reliabilityVSAvoidarea occupied by read circuits
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent extracts the operational amplifier from the per-read-circuit configuration and relocates it to a shared configuration. By placing a single operational amplifier in the current mirror circuit that serves multiple read circuits, the area occupation is dramatically reduced while the clamp function is preserved through the shared operational amplifier.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Multiple clamp circuits that previously required separate operational amplifiers are merged into a single shared operational amplifier configuration. The current mirror circuit allows one operational amplifier to control multiple read circuits, combining the functionality of multiple clamp circuits into one compact unit.

Inventive Principle:
Principle #5Merging (Combining)

3Speed

If multiple read circuits are activated simultaneously, then data access speed is improved, but power consumption increases

Engineering Contradiction:
Improvedata access speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent merges multiple read circuits into a shared architecture where a single reference cell and operational amplifier serve multiple read operations simultaneously. This allows parallel data access across multiple memory cell blocks while sharing the power-hungry components, thereby reducing total power consumption while maintaining high-speed access capability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The reference cell and operational amplifier are designed with universal functionality to support multiple read circuits operating in parallel. Through the current mirror mechanism, a single reference current source can simultaneously provide reference currents to multiple read circuits, enabling high-speed parallel access with reduced power consumption.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design reduces the area occupied by read circuits and decreases power consumption while maintaining high-speed operation by using a single reference cell and MOSFETs to generate a reference current, allowing for efficient data reading in MRAM.

Implementation Method 1

MRAM uses magnetoresistive effect (MR) elements to store information. A MR element takes two different resistance, corresponding to the state of magnetization.

Methodology Applied
Scientific EffectMagnetoresistive effect: Magnetoresistance

Implementation Method 2

Reading is performed by distinguishing the resistance of MR elements. Therefore, the reading method of detecting the resistance of the MR element with sufficient accuracy is needed.

Methodology Applied
Scientific EffectElectrical resistance measurement: Electrical Resistance

Data Source

PatentUS7791930B2Magnetoresistive random access memory
Publication Date: 2010.09.07 KIOXIA CORP
  • US7791930B2 patent drawing
  • US7791930B2 patent drawing
  • US7791930B2 patent drawing

AI summary

A MRAM includes a first magnetoresistive effect (MR) element that takes a low and high resistance states. A second MR element is fixed to a low or high resistance state. First and second MOSFETs are connected to the first and second MR elements, respectively. A sense amplifier amplifies a difference between values of current flowing through the first and second MOSFETs. A current circuit outputs reference current whose value lies between current flowing through the first MR element of the low and high resistance states. A third MOSFET has one end that receives the reference current and is connected to its own gate terminal. The gate terminal of the second MOSFET receives the same potential as the gate terminal of the third MOSFET. A first resistance element is connected to the others end of the third MOSFET and has the same resistance as the second magnetoresistive effect element.