Sense Amplifier Reference Resistance Calibration for MRAM Read Margin
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Solution Overview
Problem
The resistance distribution in magnetoresistive random access memory (MRAM) varies across input/output terminals due to mismatches, leading to decreased read margin during operations.
Innovation Solution
A memory device with a read offset compensator that includes an error detector, an offset reference resistance generator, and sense amplifier offset compensators to adjust the reference resistance based on local resistance calculations, improving read margin through offset reference resistance compensation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a fixed reference resistance is used for the sense amplifier, then the device complexity is reduced, but the read margin decreases due to resistance distribution variations across input/output terminals
Solution Approach 1:
The reference resistance is segmented into multiple adjustable units rather than using a single fixed resistance value. Each sense amplifier can individually adjust its reference resistance by selecting different combinations of resistance units, allowing compensation for local variations in resistance distribution across different input/output terminals.
Solution Approach 2:
Each sense amplifier is equipped with its own reference resistance adjustment capability, allowing local compensation for resistance variations specific to each input/output terminal. This enables each sense amplifier to optimize its reference resistance independently based on local conditions, improving overall read margin.
2Reliability
If individual calibration is performed for each sense amplifier, then the read margin increases, but the manufacturing precision requirements increase
Solution Approach 1:
The reference resistance value is made adjustable through discrete resistance units that can be selectively connected. This allows the reference resistance parameter to be changed in controlled steps to match local conditions, reducing the need for extremely precise manufacturing while still achieving optimal read margin through calibration.
Data Source
AI summary
A memory device includes a memory cell array including memory cells, a row decoder, a column decoder, a sense amplifier that reads data stored in a memory cell by detecting a difference between a source line voltage and a reference voltage during a read operation, and a control logic including a read offset compensator that receives output data from the sense amplifier and performs an offset reference resistance compensation operation. The read offset compensator compares a number of error bits of the output data with a threshold value, performs the offset reference resistance compensation operation based on a result of the comparison, calculates a local resistance for compensating an offset reference resistance for the sense amplifier during the offset reference resistance compensation operation, and adjusts a reference resistance for the sense amplifier based on the local resistance during the read operation.