MRAM Sense Amplifier Offset Cancellation Using Sampled Bias Currents
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Solution Overview
Problem
Conventional current sense amplifiers struggle to accurately read data from magnetic RAM (MRAM) due to narrow read margins at the tail bits of low-resistive and high-resistive state distributions, necessitating a solution for offset cancellation to enhance read yield requirements.
Innovation Solution
The implementation of an apparatus with first and second bias circuits and an inner amplifier that replicates currents, transforms them into voltage samples, and stores these samples using capacitors, allowing for sense amplifier offset cancellation during both sampling and amplification phases.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional current sense amplifiers are used to read data from MRAM, then the read operation can be performed, but the read margin is insufficient especially at tail bits of LRS and HRS distributions
Solution Approach 1:
The patent applies preliminary action by performing offset cancellation before the actual read operation. The sense amplifier circuit executes a calibration phase where it measures and stores offset values from reference MTJs, then subtracts these offsets from the actual read measurements. This preliminary correction enables accurate detection of tail bits that would otherwise fall within the noise margin, thereby improving both read margin and read yield.
Solution Approach 2:
The patent introduces reference MTJs as intermediary elements that serve dual purposes: they provide the offset cancellation function and also act as calibration references. These reference MTJs are strategically positioned to generate compensating signals that counteract the systematic offsets in the sense amplifier, enabling more precise measurement of the actual data-bearing MTJs without requiring additional complex circuitry.
2Device complexity
If the read current flows through the same current path used to write data, then the circuit complexity is reduced, but the read margin becomes narrow especially for tail bits
Solution Approach 1:
The patent segments the sensing operation into two distinct phases: a calibration phase using reference MTJs to measure offsets, and a measurement phase for actual data reading. This temporal segmentation allows the same physical current path to serve both write and read functions while maintaining measurement precision through phase-separated operations. The reference MTJs are spatially segmented from the data MTJs, enabling independent calibration without interfering with data storage.
Solution Approach 2:
Reference MTJs serve as intermediary elements that mediate between the shared current path and the measurement requirement. These reference MTJs introduce known test signals into the shared current path during calibration, allowing the system to characterize and compensate for path-specific offsets without requiring separate dedicated read paths. This intermediary approach maintains circuit simplicity while enabling precise measurements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables accurate sensing of MRAM bit-cells, particularly at the limits of read yield requirements, by effectively canceling offsets and improving the discernibility of tail bits, thereby enhancing the accuracy of read operations in MRAM devices.
Implementation Method 1
first and second current generators configured to replicate respective first and second currents from the first and second bias circuits
Implementation Method 2
first and second transistor devices configured to transform the first and second currents into voltage samples
Implementation Method 3
first and second capacitors configured to store the voltage samples
Implementation Method 4
provides sense amplifier offset cancellation... accurate sensing of MRAM bit-cells, particularly at the limits of read yield requirements, by effectively canceling offsets
Data Source
AI summary
In a particular implementation, an apparatus including first and second bias circuits and an inner amplifier provides sense amplifier offset cancellation. The inner amplifier includes: first and second current generators configured to replicate respective first and second currents from the first and second bias circuits, first and second transistors configured to transform the first and second currents into voltage samples, and first and second capacitors configured to store the voltage samples. In a sampling phase, a sampling of the first and second currents may be performed in the inner amplifier, and further, in an amplification phase, an amplification of the stored voltage samples may also be performed in the inner amplifier.