MRAM Top Electrode Structure for Low-Roughness MTJ Patterning

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Solution Overview

Problem

The existing etching processes for manufacturing magnetoresistive random-access memory (MRAM) devices, such as reactive ion etching and ion beam etching, often result in re-sputtering effects and high circular edge roughness due to the use of polycrystalline metal hard masks, leading to shorts between ferromagnetic layers and negatively impacting device performance.

Innovation Solution

The proposed solution involves forming a MRAM structure with a top electrode having distinct portions above and outside the second ferromagnetic layer, separated by a dielectric liner, and using anisotropic etching with amorphous dielectric hard masks to reduce circular edge roughness and prevent shorts, while also employing a method that includes forming a sacrificial dielectric layer and conducting material layers to create a structured top electrode.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If reactive ion etching (RIE) and/or ion beam etching (IBE) processes are used to pattern the MTJ stack, then the vertical MTJ stack can be formed, but re-sputtering effect causes metal elements to be re-deposited onto sidewall surfaces, resulting in shorts between ferromagnetic layers

Engineering Contradiction:
Improvepattern precisionVSAvoidshort prevention
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

A dielectric liner is introduced as an intermediary layer between the ferromagnetic layers and the re-deposited metal elements. This liner prevents direct contact between conductive paths that would otherwise create shorts, while allowing the etching process to proceed. The dielectric material acts as a protective barrier during the RIE/IBE patterning process.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If polycrystalline metal hard masks are used in RIE and/or IBE etching processes, then the etching can be performed, but grain boundaries and defects in the polycrystalline metal are transferred into the MTJ stack, resulting in high circular edge roughness (CER)

Engineering Contradiction:
Improveetching capabilityVSAvoidcircular edge roughness
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The material state of the hard mask is changed from polycrystalline to amorphous. This parameter change eliminates grain boundaries and crystalline defects that cause edge roughness during etching. The amorphous hard mask provides a uniform structure that does not transfer defects to the MTJ stack, resulting in lower circular edge roughness while maintaining etching capability.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces circular edge roughness and prevents shorts between ferromagnetic layers, enhancing the performance and reliability of MRAM devices by using a dielectric liner and amorphous hard masks in the etching process.

Implementation Method 1

such etching processes may sometimes come with re-sputtering effect, which causes metal elements from, for example, the blanket bottom electrode layer to be re-deposited onto sidewall surfaces of the ferromagnetic layers and/or the tunnel barrier layer

Methodology Applied
Scientific EffectRe-sputtering effect: Sputtering

Implementation Method 2

grain boundaries and defects in the polycrystalline metal hard mask may be transferred into the MTJ stack during the patterning process

Methodology Applied
Scientific EffectGrain boundaries:

Data Source

PatentUS20240130245A1MRAM device structure with improved top electrode
Publication Date: 2024.04.18 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US20240130245A1 patent drawing
  • US20240130245A1 patent drawing
  • US20240130245A1 patent drawing

AI summary

Embodiments of present invention provide a method of forming a MRAM structure. The method includes forming a sacrificial dielectric layer on top of a bottom contact; forming a stack of a first ferromagnetic layer, a tunnel barrier layer, a second ferromagnetic layer, and at least one hard mask on top of the sacrificial dielectric layer; forming an interlevel-dielectric (ILD) layer surrounding the stack; creating one or more via holes in the ILD layer to expose the sacrificial dielectric layer; selectively removing the sacrificial dielectric layer to create an opening underneath the first ferromagnetic layer; filling the opening with a first conductive material to form a bottom electrode; removing the at least one hard mask to expose the second ferromagnetic layer; and forming a top electrode of a second conductive material on top of the second ferromagnetic layer. An MRAM structure formed thereby is also provided.