MRAM Two-Phase Boost Programming for Oxide Stress Reduction
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Solution Overview
Problem
Current MRAM technologies rely on a single phase boost for programming both parallel and anti-parallel memory elements, which can lead to inefficiencies and stress on oxide components, limiting the reliability and area efficiency of memory devices.
Innovation Solution
Implementing a two-phase programming scheme where anti-parallel and parallel data values are programmed in separate phases with a voltage boost applied during the first phase, allowing for optimized capacitive coupling and reduced oxide stress, enabling smaller transistor sizes and improved decoding complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single phase boost is used to program both parallel and anti-parallel memory elements, then the programming process is simplified, but significant voltage stress is applied to oxide components reducing reliability
Solution Approach 1:
The programming process is divided into two separate phases: a first programming phase for anti-parallel memory elements and a second programming phase for parallel memory elements. This segmentation allows voltage boost to be applied selectively only when needed (in the first phase), eliminating unnecessary voltage stress on oxide components during the second phase while maintaining programming effectiveness.
2Device complexity
If a single phase boost is used for programming, then the control logic is simplified, but transistor sizes must be larger to handle voltage stress
Solution Approach 1:
By segmenting the programming into two phases with selective voltage boost application, the transistors only need to handle voltage stress during the first phase. This allows for smaller transistor sizes compared to a single-phase approach where transistors must continuously handle full voltage stress, thereby reducing the overall memory device area while the control logic remains manageable.
3Productivity
If a single phase boost is used, then the programming operation is faster, but area efficiency is reduced due to larger transistor sizes
Solution Approach 1:
The two-phase programming approach segments the programming operations to apply voltage boost only when necessary. This enables the use of smaller transistors that fit more densely in the memory array, improving area efficiency. The segmentation optimizes the balance between programming speed and area utilization by eliminating redundant voltage stress periods.
Solution Approach 2:
The programming process uses periodic action by alternating between two distinct programming phases with different voltage conditions. This periodic structure allows the system to achieve both fast programming (through selective voltage boost when needed) and high area efficiency (through smaller transistors that don't need to continuously withstand full voltage stress).
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability and area efficiency of MRAM devices by eliminating significant voltage stress and allowing for smaller transistor sizes, resulting in higher-density, low-cost, and high-reliability memory solutions.
Implementation Method 1
transitioning a second terminal of the first memory element and a second terminal of a second memory element from the reference voltage to the operating voltage to increase the operating voltage at the activation terminal of the first memory element
Data Source
AI summary
Memory devices, such as MRAM devices, are described that comprise memory elements for storing data and configuration logic for programming memory elements using a two phase boost. The memory devices perform the two phase boosting to program anti-parallel data values during a first programming phase and to program parallel data values during a second programming phase that is subsequent to the first programming phase. The voltage boost is provided by a high percentage of memory elements in a memory device by simultaneously transitioning the source line of the memory elements from a reference voltage to a source voltage during the first programming phase to effectively double the activation voltage for gates of transistors in the memory elements to program anti-parallel data values. Methods are also described for programming memory elements using a two phase boost.