MRAM Via Etch Stop Stack for Precise Etching and Dielectric Protection
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Solution Overview
Problem
The semiconductor industry faces challenges in forming reliable semiconductor devices at smaller feature sizes due to increased complexity in fabrication processes, particularly in forming via structures for Magnetoresistive Random Access Memory (MRAM) devices, where etch stop layers must be thin to prevent damage to dielectric layers during etching while ensuring the etching operation stops correctly.
Innovation Solution
A dual-layer etch stop layer comprising a metal-based nitride bottom layer and a metal-based oxide top layer, with a combined thickness of up to 1100 angstroms, is used to control etching operations, allowing for reduced etching time and minimizing damage to dielectric layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a single-layer etch stop layer is used, then the structure is simple, but the etching operation cannot precisely control the stopping point while minimizing damage to dielectric layers
Solution Approach 1:
The etch stop layer is divided into two distinct layers: a first etch stop layer (e.g., silicon nitride) and a second etch stop layer (e.g., silicon oxide). This segmentation allows each layer to serve a specific function - the first layer provides the primary etch stop function while the second layer protects the dielectric layer from damage, thereby achieving precise etching control without excessive structural complexity.
Solution Approach 2:
Different materials are used for different layers of the etch stop structure. The first etch stop layer uses a material with high etch selectivity (such as silicon nitride) to provide precise stopping control, while the second etch stop layer uses a protective material (such as silicon oxide) to minimize damage to the underlying dielectric layer. This local differentiation of material properties optimizes each layer's function.
2Manufacturing precision
If the etch stop layer thickness is increased, then the etching operation has better stopping control, but damage to dielectric layers increases
Solution Approach 1:
The total etch stop layer thickness is segmented into two portions with different materials. The first etch stop layer has a thickness optimized for etching stopping control, while the second etch stop layer provides additional protection to the dielectric layer. This segmentation allows the system to achieve both good stopping control and minimal dielectric damage without requiring a uniformly thick etch stop layer.
Solution Approach 2:
The second etch stop layer acts as an intermediary protective layer between the first etch stop layer and the dielectric layer. It absorbs excess etching energy and prevents direct damage to the dielectric layer, thereby reducing harmful effects while maintaining etching stopping control.
3Object-affected harmful factors
If a thin etch stop layer is used, then damage to dielectric layers is minimized, but the etching operation may not stop correctly
Solution Approach 1:
The etch stop function is segmented between two layers. The first etch stop layer, being thin, minimizes damage to the dielectric layer, while the second etch stop layer provides the necessary thickness and material properties to ensure accurate etching stopping. Together, they achieve both minimal damage and accurate stopping control.
Solution Approach 2:
The system changes the material composition parameter of the etch stop structure by using two different materials with different etch selectivities. This allows optimization of the thin first layer for minimal damage while the second layer provides sufficient thickness for accurate stopping, achieving both goals through material parameter differentiation.
Data Source
AI summary
A structure includes a substrate, a transistor, a contact, an oxygen-free etch stop layer, an oxygen-containing etch stop layer, a dielectric layer, and a via. The transistor is on the substrate. The contact is on a source/drain region of the transistor. The oxygen-free etch stop layer spans the contact. The oxygen-containing etch stop layer extends along a top surface of the oxygen-free etch stop layer. The dielectric layer is over the oxygen-containing etch stop layer. The via passes through the dielectric layer, the oxygen-containing etch stop layer, and the oxygen-free etch stop layer and lands on the contact. The memory stack lands on the via.


