MRAM Access Transistor Tuning for Weak Cell Yield Recovery

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Solution Overview

Problem

Magnetoresistive random-access memory (MRAM) arrays often include weak cells that fail to function correctly, leading to high bit-error-rates, which limit their yield and reliability, as these cells do not maintain sufficient resistance and require replacement with redundant cells.

Innovation Solution

Increasing the programming voltage of weak MRAM cells by modifying their access transistors through hot carrier injection into the gate dielectric, lowering the threshold voltage to ensure proper functionality, which involves grounding the source line, biasing the word line above the threshold voltage, and biasing the bit line higher than normal operational voltage to generate electron-hole pairs and inject carriers into the gate dielectric.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If weak MRAM cells are identified and modified through hot carrier injection, then the functionality and reliability of MRAM cells is improved, but the manufacturing process complexity increases

Engineering Contradiction:
ImproveMRAM cell functionalityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by performing hot carrier injection during the manufacturing process to proactively modify weak MRAM cells before they are deployed. This preventive approach identifies and repairs cells with threshold voltage issues early in the manufacturing sequence, improving overall array reliability without requiring post-manufacturing intervention or replacement of defective cells.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent employs parameter changes by modifying the threshold voltage parameter of access transistors in weak MRAM cells through hot carrier injection. By changing the electrical parameter (threshold voltage) of the transistor, the patent transforms non-functional or weak cells into functional ones, directly improving MRAM cell reliability while maintaining the existing cell structure.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If hot carrier injection is performed to lower threshold voltage, then weak MRAM cells can function properly, but the manufacturing time and process steps increase

Engineering Contradiction:
ImproveMRAM cell operationVSAvoidmanufacturing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent merges the hot carrier injection process with existing manufacturing steps by integrating it into the formation sequence of the MRAM array. Rather than adding a separate, time-consuming post-processing step, the modification is combined with the standard manufacturing flow, allowing multiple operations to occur in a unified process sequence and minimizing additional time requirements.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

By performing the threshold voltage modification during the manufacturing process itself rather than after completion, the patent eliminates the need for separate repair or replacement operations. This preliminary action approach ensures that weak cells are corrected in-place during production, avoiding delays associated with post-manufacturing intervention.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If access transistors are modified in weak MRAM cells, then bit-error-rate is reduced, but the manufacturing precision requirements increase

Engineering Contradiction:
Improvebit-error-rateVSAvoidthreshold voltage control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent utilizes parameter changes by systematically adjusting the threshold voltage of access transistors through controlled hot carrier injection. This method provides a measurable and controllable way to modify transistor characteristics, allowing precise adjustment of the threshold voltage parameter to bring weak cells into the acceptable operational range while maintaining manufacturing precision.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent implements feedback by monitoring the performance of MRAM cells during manufacturing and identifying weak cells that require modification. This feedback mechanism allows the system to detect cells with insufficient threshold voltage margins and apply targeted hot carrier injection only to those specific cells, ensuring precise control over the modification process and minimizing unnecessary interventions.

Inventive Principle:
Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method effectively improves the yield and reliability of MRAM arrays by ensuring weak cells function correctly, reducing bit-error-rates and enhancing the overall usability of the MRAM device by lowering the threshold voltage of access transistors, thereby improving the operational performance of the MRAM cells.

Implementation Method 1

modifying the access transistor includes performing a hot carrier injection into a gate dielectric layer of the access transistor to lower a threshold voltage of the access transistor

Methodology Applied
Scientific EffectHot carrier injection: Electron Impact Desorption

Implementation Method 2

performing the hot carrier injection includes causing hot electrons to be accelerated from the source of the access transistor to the drain of the access transistor to generate electron-hole pairs through impact ionization

Methodology Applied
Scientific EffectImpact ionization: Impact Force

Data Source

PatentUS20230329122A1MRAM memory array yield improvement
Publication Date: 2023.10.12 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US20230329122A1 patent drawing
  • US20230329122A1 patent drawing
  • US20230329122A1 patent drawing

AI summary

Embodiments of present invention provide a method of improving yield of making MRAM arrays. More specifically, the method includes receiving an MRAM array; identifying a weak MRAM cell from the MRAM array wherein the weak MRAM cell includes an access transistor; and modifying the access transistor. In one embodiment, modifying the access transistor includes performing a hot carrier injection into a gate dielectric layer of the access transistor.