Radiation-Hardened MRAM Write Circuit With Photo-Current Cancellation
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Solution Overview
Problem
Radiation-induced photo-currents disrupt the functionality of electronic circuits, particularly in radiation-hardened applications like MRAM, by shifting current magnitudes and causing false writes, even below the radiation dose rate upset level, which is critical for military and space applications where reliability is paramount.
Innovation Solution
The implementation of passive transistors co-located with operational transistors to offset radiation dose rate photo-currents, ensuring that the radiation dose rate photo-currents generated by operational transistors are substantially canceled, thereby maintaining circuit stability and preventing false writes, and the use of radiation-hardened NAND gates and inverting buffer gates to inhibit write currents above the radiation dose rate upset level.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If standard address inputs and latches are used in MRAM, then the circuit can operate normally under standard conditions, but the circuit becomes unreliable above the radiation dose rate upset (DRU) level due to photo-currents
Solution Approach 1:
The patent applies preliminary anti-action by implementing write inhibition logic that detects radiation conditions and prevents write operations before radiation-induced photo-currents can cause false writes. The circuit monitors for radiation events and proactively disables the write path, preventing the harmful effect rather than correcting it after occurrence.
Solution Approach 2:
The patent introduces an intermediary radiation detection and control circuit that sits between the standard address inputs/latches and the MRAM array. This intermediary layer detects radiation conditions and mediates by inhibiting write operations when necessary, allowing standard components to be used while protecting against radiation effects.
2Reliability
If write operations are inhibited above the DRU level, then false writes are prevented, but the MRAM array cannot be written during radiation events
Solution Approach 1:
The patent applies dynamics by making the write inhibition state dynamic rather than fixed. The inhibition is activated only when radiation detection circuitry identifies a radiation event, and can be deactivated when the event subsides. This allows normal write operations during non-radiation periods while providing protection during radiation events.
Solution Approach 2:
The patent changes the operational parameters of the MRAM write circuit based on radiation conditions. Under normal conditions, writes proceed with standard current levels. When radiation is detected, the circuit parameter changes to inhibit writes or adjust current levels, adapting the system behavior to the environmental conditions.
3Reliability
If higher write currents are used to ensure bit switching, then fully-selected bits write reliably, but half-selected bits may also switch causing false writes
Solution Approach 1:
The patent prevents false writes by implementing preliminary anti-action through write inhibition logic that detects radiation conditions and blocks write operations before they can occur. This prevents the scenario where higher currents would cause both fully-selected and half-selected bits to switch.
Solution Approach 2:
The patent extracts the write inhibition function as a separate control mechanism that operates independently of the bit selection logic. This extracted function specifically addresses the false write problem by preventing writes during radiation events, separating the concern of reliable bit switching from the concern of preventing false writes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces the impact of radiation-induced photo-currents on circuit operations, ensuring reliable performance below the radiation dose rate upset level and preventing false writes, thus meeting stringent requirements for military and space applications by maintaining circuit stability and preventing data corruption.
Implementation Method 1
Radiation can generate hole-electron pairs in the junction of a transistor, which results in a photo-current through the junction
Data Source
AI summary
Radiation hardening, detection and protection design methods are disclosed. An example write drive circuit is disclosed having radiation hardened analog circuitry. A passive transistor is provided to generate a radiation photo-current to offset any net radiation photo-current of the operational circuitry. Using this technique, a radiation hardened reference-mirror control circuit provides a switched write current for setting the logical state of MRAM bits during a radiation event, for instance. A radiation detector and radiation hardened logic gates are further provided for inhibiting the write current when a radiation level is above a predetermined level.