MRAM Write Verify Programming via Tailored Voltage
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Solution Overview
Problem
Magnetic random access memory (MRAM) devices face higher energy consumption and lower reliability due to the high voltage and current required for data access, leading to dielectric breakdown of magnetic tunnel junctions and reduced device lifetime.
Innovation Solution
The memory device applies tailored voltages to magnetic tunnel junctions based on their natural resistance, using a first voltage to set MTJs to a high or low resistive state and a second voltage with greater magnitude or duration to ensure accurate switching, reducing the risk of breakdown and extending device life.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high voltage and current are applied to MRAM devices to read and write data bits, then data access functionality is achieved, but energy consumption increases and reliability decreases due to dielectric breakdown
Solution Approach 1:
The patent applies different voltage magnitudes and durations to different subsets of bit cells based on their individual resistance characteristics. Bit cells are divided into groups requiring different write voltages, with each group receiving tailored voltage parameters optimized for its resistance level, thereby reducing overall energy consumption while maintaining reliability
Solution Approach 2:
The patent dynamically adjusts voltage magnitude and duration parameters based on the resistance state of individual bit cells. By measuring resistance and selecting from multiple voltage profiles (different magnitudes and durations), the system optimizes the balance between achieving reliable data writing and minimizing energy consumption and dielectric stress
2Manufacturing precision
If high voltage is applied to ensure accurate switching of MTJs, then data writing accuracy is improved, but the risk of dielectric breakdown increases and device lifetime is reduced
Solution Approach 1:
The patent implements localized voltage optimization by categorizing bit cells into subsets based on resistance measurements and applying appropriate voltage levels to each subset. This ensures accurate switching for each bit cell while avoiding excessive voltage that would cause dielectric breakdown and extend device lifetime
Solution Approach 2:
The patent performs preliminary resistance measurements on bit cells before applying write voltages. Based on these measurements, the system pre-determines the appropriate voltage magnitude and duration for each bit cell, ensuring accurate switching while minimizing dielectric stress before the actual write operation occurs
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces power consumption and enhances the reliability of MRAM devices by optimizing voltage application based on the resistance of individual bit cells, thereby extending the usable life of the memory device.
Implementation Method 1
the data is stored by maintaining a desired state on a magnetic tunnel junction (MTJ) or a differential state between pairs of MTJs. The states of each bit of the memory device are typically set or switched by applying a voltage across a corresponding MTJ.
Data Source
AI summary
A memory device is configured to identify a set of bit cells to be changed from a first state to a second state. In some examples, the memory device may apply a first voltage to the set of bit cells to change a least a first portion of the set of bit cells to the second state. In some cases, the memory device may also identify a second portion of the bit cells that remained in the first state following the application of the first voltage. In these cases, the memory device may apply a second voltage having a greater magnitude, duration, or both to the second portion of the set of bit cells in order to set the second portion of bit cells to the second state.