MRI RF Coil Receiver Resampling with a Free-Running ADC Clock
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Solution Overview
Problem
Existing direct digital receivers for magnetic resonance imaging systems require a system clock to maintain frequency lock with the ADC, limiting design freedom and introducing noise, as well as requiring voltage control for clock adjustments.
Innovation Solution
A direct digital receiver with a local clock oscillator independent of the system clock, a phase detector to determine phase differences, and a resampling unit to adjust the digital sample output signal, allowing for a free-running ADC clock and reducing the need for system clock distribution, thereby simplifying component localization and reducing RF interactions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a system clock is distributed to the ADC to maintain frequency lock, then the sampling frequency can be synchronized with the digital operating frequency, but the design freedom is limited and noise is introduced
Solution Approach 1:
The patent divides the clock system into two independent parts: a system clock for digital processing and a local free-running clock for the ADC. This segmentation eliminates the need for clock distribution while maintaining independent optimization of each subsystem, resolving the contradiction between synchronization precision and system complexity.
Solution Approach 2:
The patent introduces a resampling unit as an intermediary between the ADC and digital processing stages. This resampler compensates for frequency differences between the independent clocks through phase detection and digital resampling, achieving synchronization without direct clock distribution, thus reducing complexity while maintaining precision.
2Measurement precision
If a system clock is distributed to the ADC, then frequency lock is maintained, but voltage control for clock adjustments is required
Solution Approach 1:
The patent replaces the voltage-controlled clock adjustment mechanism with a purely digital resampling approach. The resampler uses phase detection and digital signal processing to compensate for frequency variations, eliminating the need for voltage control circuits and simplifying the operation while maintaining frequency lock precision.
3Adaptability or versatility
If a local free running clock is used for the ADC, then design freedom and component localization are improved, but frequency synchronization with the system clock becomes independent
Solution Approach 1:
The resampling unit acts as an intermediary that bridges the independent local clock and system clock domains. It detects phase differences and applies digital resampling to synchronize the ADC output with the system clock, thereby maintaining frequency synchronization precision while preserving the design freedom of using independent clocks.
Solution Approach 2:
The patent implements a feedback mechanism through phase detection between the local clock and system clock. The phase information is fed back to the resampler, which adjusts the sampling timing accordingly, ensuring continuous frequency synchronization despite the independence of the two clock sources.
Data Source
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AI summary
The invention relates to direct digital receiver for an RF coil (11, 12, 13, 200), in particular of a magnetic resonance imaging system (1), for providing a digital sample output signal at a digital operating frequency in a time base of a system clock (222), the receiver comprising: - an analogue-to-digital converter (214) for converting an analogue signal received from the RF coil (11, 12, 13, 200) to a digital sample input signal, the analogue-to- digital converter (214) being driven by a local clock, a local clock oscillator (400) adapted for providing the local clock in a local clock time base to the analogue-to-digital converter (214), the local clock time base being independent of the system clock time base, a phase detector (402) adapted for determining a phase difference (512) between the system clock (222) and the local clock, a resampling unit (224) adapted for resampling the digital sample input signal to the digital sample output signal using said phase difference (512).