MTJ Interconnect Alignment Structure for Compact MRAM Cells

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Solution Overview

Problem

Existing magnetoresistive random access memory (MRAM) devices face issues such as high chip area, high cost, high power consumption, limited sensitivity, and susceptibility to temperature variations, which affect their performance and efficiency.

Innovation Solution

A semiconductor device with a magnetic tunneling junction (MTJ) structure, including specific spacers, liners, and metal interconnections formed through advanced fabrication processes like reactive ion etching and atomic layer deposition, to enhance alignment and integration of components, reducing chip area and improving sensitivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If conventional MRAM devices are used, then data storage capability is achieved, but chip area is large

Engineering Contradiction:
Improvechip areaVSAvoiddata storage capability
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent transitions from planar 2D MRAM structures to three-dimensional vertically stacked MTJ structures. Multiple MTJ cells are stacked along the vertical direction, enabling higher storage density within the same chip footprint. This dimensional change allows achieving larger storage capacity without proportionally increasing chip area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent implements nested structures where multiple functional layers are stacked vertically - including MTJ cells, interlayer dielectrics, conductive plugs, and interconnections - forming a compact three-dimensional integrated structure. This nesting approach maximizes space utilization and reduces the horizontal chip area required.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Use of energy by moving object

If conventional MRAM devices are used, then basic storage function is provided, but power consumption is high

Engineering Contradiction:
Improvepower consumptionVSAvoidstorage function
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent employs spin-transfer torque (STT) mechanism to replace conventional current-based write operations. By utilizing spin-polarized electrons to exert torque on magnetic moments, the device achieves lower power consumption for writing operations while maintaining reliable data storage and retrieval functions.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent optimizes material composition and structural parameters of the MTJ stack, including barrier layer thickness, magnetic layer compositions, and interface structures, to reduce critical current density and switching energy. These parameter optimizations enable lower power consumption while preserving storage reliability.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If conventional MRAM devices are used, then general sensing capability is achieved, but sensitivity to magnetic fields is limited

Engineering Contradiction:
Improvesensitivity to magnetic fieldsVSAvoiddevice structure
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent utilizes composite magnetic tunneling junction structures with multiple functional layers including ferromagnetic layers, antiferromagnetic layers, and magnetic barrier layers. These composite materials provide enhanced magnetic sensitivity and controlled magnetic anisotropy, enabling precise magnetic field detection while managing device complexity through standardized fabrication processes.

Inventive Principle:
Principle #40Composite materials

4Reliability

If conventional MRAM devices are used, then basic operation is achieved, but performance is easily affected by temperature variation

Engineering Contradiction:
Improveperformance stabilityVSAvoidtemperature variation sensitivity
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The patent carefully selects and optimizes material parameters including Curie temperatures, magnetic anisotropy energies, and barrier layer compositions to ensure stable magnetic properties across a wide temperature range. The antiferromagnetic coupling and pinned layer structures are designed to maintain magnetic stability under thermal variations.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs composite structures with materials having complementary thermal properties, where the combination of ferromagnetic, antiferromagnetic, and oxide barrier layers creates a system with reduced temperature sensitivity. The interfacial effects and magnetic coupling in these composite structures provide thermal stability.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed structure reduces chip area, lowers power consumption, and enhances sensitivity to magnetic fields, addressing the limitations of current MRAM devices.

Implementation Method 1

Magnetoresistance (MR) effect has been known as a kind of effect caused by altering the resistance of a material through variation of outside magnetic field

Methodology Applied
Scientific EffectMagnetic tunneling effect: Magnetoresistance

Implementation Method 2

advanced fabrication processes like reactive ion etching

Methodology Applied
Scientific EffectReactive ion etching: Plasma

Implementation Method 3

advanced fabrication processes like reactive ion etching and atomic layer deposition

Methodology Applied
Scientific EffectAtomic layer deposition: Chemical Vapour Deposition

Data Source

PatentUS20250344611A1Semiconductor device and method for fabricating the same
Publication Date: 2025.11.06 UNITED MICROELECTRONICS CORP
  • US20250344611A1 patent drawing
  • US20250344611A1 patent drawing
  • US20250344611A1 patent drawing

AI summary

A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a first spacer on one side of the of the MTJ, a second spacer on another side of the MTJ, a first metal interconnection on the MTJ, and a liner adjacent to the first spacer, the second spacer, and the first metal interconnection. Preferably, each of a top surface of the MTJ and a bottom surface of the first metal interconnection includes a planar surface and two sidewalls of the first metal interconnection are aligned with two sidewalls of the MTJ.