Amorphous Seed Layers in Magnetic Tunneling Junctions for High TMR

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Solution Overview

Problem

Existing magnetic tunneling junction devices and memory devices, such as MRAM, face challenges in achieving high tunneling magnetoresistance (TMR) ratios and exchange fields (Hex), with crystal structure collisions during high-temperature manufacturing processes leading to deteriorated crystallinity and performance degradation.

Innovation Solution

Incorporating amorphous seed layers of CoFeX and CoFeXTa, along with anti-crystallized and polarization enhancing layers, to maintain structural integrity during high-temperature heat treatments, ensuring improved crystal quality and enhanced TMR ratios and Hex.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If high-temperature heat treatment is performed to improve crystal quality, then TMR ratio and exchange field are enhanced, but crystal structure collision occurs leading to deteriorated crystallinity

Engineering Contradiction:
ImproveTMR ratioVSAvoidcrystallinity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

An amorphous seed layer is introduced as an intermediary between the substrate and the magnetic tunneling junction layers. This seed layer acts as a buffer that prevents harmful crystal structure collisions during high-temperature heat treatment, allowing the underlying layers to maintain or improve their crystallinity while enabling higher processing temperatures that enhance TMR ratio and exchange field

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention changes the physical state parameter of the seed layer from crystalline to amorphous. This parameter change allows the seed layer to remain structurally flexible during heat treatment, absorbing thermal stress without transmitting damaging crystal structure collisions to the magnetic tunneling junction layers, thereby enabling high-temperature processing that improves device performance

Inventive Principle:
Principle #35Parameter changes

2Reliability

If high-temperature heat treatment is performed to enhance exchange field, then device performance is improved, but structural integrity deteriorates due to crystal structure collision

Engineering Contradiction:
Improveexchange fieldVSAvoidstructural integrity
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The amorphous seed layer serves as a protective intermediary that decouples the thermal processing from the sensitive magnetic tunneling junction structure. It absorbs and dissipates thermal stress during high-temperature heat treatment, preventing structural degradation while allowing the exchange field to be enhanced through controlled thermal processes

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If conventional seed layers are used, then manufacturing is simpler, but TMR ratio and exchange field are insufficient

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidTMR ratio
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The invention modifies the compositional parameters of the seed layer by making it amorphous and adjusting its thickness to a specific range (5-20 nm). This parameter change enables the seed layer to fulfill dual functions: maintaining ease of manufacture through simple deposition processes while simultaneously enabling high TMR ratio and exchange field through its unique amorphous structure that facilitates superior interfacial properties

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed structure allows for high-temperature manufacturing processes, resulting in magnetic tunneling junction devices with superior TMR ratios and Hex, thereby improving the performance and reliability of memory devices like STT-MRAM and SOT-MRAM.

Implementation Method 1

The seed layer includes at least one amorphous CoFeX and does not comprises boron (B)

Methodology Applied
Scientific EffectAmorphous structure:

Implementation Method 2

The resistance of a magnetic tunneling junction device varies with the magnetization direction of a free layer

Methodology Applied
Scientific EffectTunneling magnetoresistance (TMR): Magnetoresistance

Implementation Method 3

a magnetic tunneling junction devices that may be manufactured by performing heat treatment at a temperature equal to or greater than 300° C.

Methodology Applied
Scientific EffectHeat treatment: Heat Treatment

Data Source

PatentUS20250261565A1Magnetic tunneling junction device and memory device including the same
Publication Date: 2025.08.14 SAMSUNG ELECTRONICS CO LTD
  • US20250261565A1 patent drawing
  • US20250261565A1 patent drawing
  • US20250261565A1 patent drawing

AI summary

Provided are a magnetic tunneling junction device having a relatively high tunneling magnetoresistance (TMR) ratio; and a memory device including the magnetic tunneling junction device. The magnetic tunneling junction device includes: a pinned layer having a first surface and a second surface opposite the first surface; a seed layer disposed in contact with the first surface of the pinned layer; a free layer disposed to face the second surface of the pinned layer; and a tunnel barrier layer disposed between the pinned layer and the free layer, wherein the seed layer includes at least one amorphous material selected from CoFeX and CoFeXTa, and the X includes at least one element selected from niobium (Nb), molybdenum (Mo), tungsten (W), chromium (Cr), zirconium (Zr), and hafnium (Hf). The seed layer may not include boron.