MTJ Memory Cell Current Mirroring for High-Margin Data Reading
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing memory devices face challenges in achieving a large signal difference and accurate data reading due to variations in clamp voltages and inherent characteristics of memory cells.
Innovation Solution
The memory device incorporates a current mirror circuit that uses the cell current as a reference to generate a copied output current, which is integrated to form the potential at the sense amplifier circuit, thereby ensuring a large signal difference and accurate data reading.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a conventional read circuit is used to read data from the memory cell, then the data can be read out, but the signal difference is small and reading accuracy is poor due to variations in clamp voltages and inherent memory cell characteristics
Solution Approach 1:
The patent uses a current mirror circuit to create a copied version of the cell current. The current mirror circuit includes a first transistor coupled to the bit line and a second transistor coupled to the sense amplifier, where the second transistor mirrors the current from the first transistor. This copying mechanism allows the sense amplifier to receive a stable, mirrored current signal that is less susceptible to voltage variations, thereby improving both signal difference and reading accuracy simultaneously.
2Measurement precision
If precise timing control is implemented to achieve accurate data reading, then reading accuracy improves, but the control complexity and power consumption increase
Solution Approach 1:
The current mirror circuit automatically adjusts the signal provided to the sense amplifier based on the actual cell current, without requiring external timing control. The mirroring mechanism inherently compensates for variations in clamp voltages and memory cell characteristics, making the system self-regulating. This eliminates the need for complex timing control circuits while maintaining high reading accuracy.
3Device complexity
If the sense amplifier directly receives the cell current, then the circuit is simple, but the signal difference is insufficient for reliable data reading
Solution Approach 1:
The current mirror circuit acts as an intermediary between the bit line and the sense amplifier. Instead of directly coupling the sense amplifier to the bit line, the patent introduces the current mirror circuit that buffers and mirrors the cell current. This intermediary component amplifies the signal difference while isolating the sense amplifier from voltage variations, achieving reliable data reading without significantly increasing circuit complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows for high-margin data reading with reduced power consumption, as the output current is controlled based on the resistance state of the MTJ element, eliminating the need for precise timing control.
Implementation Method 1
The magnetic memory device stores data using a magnetoresistance effect
Data Source
AI summary
A memory cell includes a first terminal and a second terminal. A first interconnect is coupled to the first terminal. A second interconnect is coupled to the second terminal. A first switch is coupled between the second interconnect and a third interconnect configured to be coupled to a first voltage. A current mirror circuit includes a third terminal and a fourth terminal, is coupled to the first interconnect at the third terminal, and is configured to output an output current using a first current flowing through the first interconnect as a reference current at the fourth terminal. A sense amplifier circuit is coupled to the fourth terminal.