Ion Beam Etching for MTJ Sidewall Re-deposition Control
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Solution Overview
Problem
The existing methods for fabricating Magnetic Tunnel Junction (MTJ) devices face challenges in minimizing conductive sidewall re-deposition and beam-induced damage during ion beam etching, which affects device performance, especially at sub-100 nm scales, leading to potential shorting paths and performance deterioration.
Innovation Solution
A two-step ion beam etching process is designed where the wafer is not rotated, and the ion beam is tilted such that its horizontal component is parallel to the patterned features, first forming and then patterning perpendicular arrays of hard mask lines to minimize re-deposition and beam-induced damage, ensuring no re-deposition on the MTJ sidewalls.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional ion beam etching is used to pattern MTJ devices, then pattern transfer is achieved, but conductive sidewall re-deposition occurs causing shorting paths and performance deterioration
Solution Approach 1:
The patent divides the single etching process into two sequential etching steps with different ion beam orientations. The first etching step patterns features in one direction, and the second etching step patterns features in the perpendicular direction. This segmentation allows each step to be optimized independently, preventing re-deposition on vertical sidewalls by orienting the ion beam horizontally during etching.
Solution Approach 2:
The patent introduces a new dimension to the etching process by tilting the ion beam at a specific angle (e.g., 45 degrees) relative to the substrate normal. Instead of etching vertically downward, the ion beam approaches from the side, allowing material to be removed while preventing re-deposited material from adhering to vertical sidewalls. This dimensional change in beam orientation resolves the re-deposition problem.
2Manufacturing precision
If ion beam etching is performed to transfer pattern into MTJ, then pattern definition is achieved, but beam-induced damage and intermixing occur on sidewalls
Solution Approach 1:
The patent segments the pattern transfer process into two separate etching steps oriented in perpendicular directions. By dividing the process, each step exposes sidewalls to fewer ion beam passes, reducing cumulative beam-induced damage and intermixing while still achieving complete pattern transfer through the combined effect of both steps.
Solution Approach 2:
The patent changes the ion beam orientation from vertical to tilted (e.g., 45 degrees), introducing a horizontal component to the etching direction. This dimensional change allows the ion beam to remove material while minimizing direct impact on vertical sidewalls, thereby reducing beam-induced damage and intermixing on the sidewall surfaces.
3Productivity
If sub-100 nm device scaling is pursued, then device density increases, but sidewall re-deposition and damage have greater impact on performance
Solution Approach 1:
The patent applies segmentation by using two sequential etching steps instead of one, which is particularly beneficial for sub-100 nm devices. The divided process reduces the intensity of each individual etching step, minimizing re-deposition and beam damage effects that are magnified at smaller dimensions, while still achieving the required pattern fidelity for high-density device scaling.
Solution Approach 2:
The patent employs tilted ion beam etching at angles such as 45 degrees, changing the etching direction from vertical to oblique. This dimensional approach prevents re-deposited material from settling on vertical sidewalls, which is critical for maintaining sidewall cleanliness and device reliability in sub-100 nm structures where even minimal contamination can cause performance degradation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces conductive sidewall re-deposition and beam-induced damage, enhancing device reliability and performance by eliminating re-deposition paths and minimizing the need for subsequent sidewall treatment, thereby improving chip-level defect rates.
Implementation Method 1
A first ion beam etching is performed on the MTJ stack using the first pattern
Implementation Method 2
Ion beam etching (IBE) to limit re-deposition
Data Source
AI summary
A first pattern is formed on an MTJ stack as a first array of first parallel bands. A first ion beam etching is performed on the MTJ stack using the first pattern wherein a tilt between an ion beam source and the substrate is maintained such that a horizontal component of the ion beam is parallel to the first parallel bands and the substrate is not rotated. Thereafter, a second pattern is formed on the MTJ stack as a second array of parallel bands wherein the second parallel bands are perpendicular to the first parallel bands. A second ion beam etching is performed using the second pattern wherein a tilt between an ion beam source and the substrate is maintained such that a horizontal component of the ion beam is parallel to the second parallel bands and wherein the substrate is not rotated to complete formation of the MTJ structure.