MTJ Non-Volatile Register Feedback for Robust State Readback
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Solution Overview
Problem
Existing non-volatile memory technologies for mobile devices fail to robustly store and recall the state of sequential logic circuit elements when powered down, leading to potential data loss and operational issues upon restart.
Innovation Solution
The use of a circuit comprising a pair of serially connected magnetic tunneling junction (MTJ) devices as a non-volatile memory cell, coupled with a multiplexer, flip-flop, and edge detector, allows for robust read and write operations by controlling current direction and voltage transitions to store and recall logical states effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If voltage rises from LOW to HIGH at the output node during a read operation, then the stored logical state is detected, but the multiplexer may incorrectly latch the intermediate HIGH state as a logical 1
Solution Approach 1:
The edge detector is configured to detect only the falling edge (HIGH to LOW transition) of the output node voltage. By anticipating the potential error of latching the intermediate HIGH state, the circuit proactively prevents this error by ignoring rising edges and only responding to the definitive falling edge that indicates the true logical state has been reached. This preliminary anti-action eliminates the risk of incorrect state detection during voltage transitions.
2Reliability
If the MTJ device resistance changes during state transitions, then the logical state is stored, but voltage fluctuations may cause false detection of state changes
Solution Approach 1:
The read operation uses periodic clock cycles to sample the output node voltage. The edge detector is triggered only on falling edges that occur during specific phases of the clock cycle, allowing the circuit to periodically check for state changes while ignoring transient fluctuations. This periodic sampling approach distinguishes between genuine state transitions and temporary voltage variations caused by MTJ resistance changes.
3Use of energy by moving object
If the circuit powers down sequential logic elements to save battery power, then energy consumption is reduced, but the volatile state is lost requiring store and recall operations
Solution Approach 1:
Before the sequential logic element is powered down, the circuit performs a preliminary store operation that detects the current logical state and latches it in the multiplexer. This preliminary action ensures that when power is restored, the state recall operation can quickly retrieve the pre-stored state without needing to perform complex detection algorithms, thereby minimizing the time loss during startup while maintaining energy savings during idle periods.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution ensures reliable storage and recall of sequential logic circuit elements' states, improving power management and reducing data loss by enabling robust store and read operations, even in low power conditions.
Implementation Method 1
Magnetic tunneling junction devices (MTJs) have emerged as a promising non-volatile memory technology
Implementation Method 2
The first and second MTJ devices are coupled to an output node to drive the output node to a voltage indicative of the stored logical 0 or logical 1
Data Source
AI summary
A magnetic tunneling junction non-volatile register with feedback for robust read and write operations. In an embodiment, two MTJ devices are configured to store a logical 0 or a logical 1, and are coupled to drive an output node to a voltage indicative of the stored logical 0 or a logical 1. The output of a D flip-flop is fed to the two MTJ devices so that the state of the D flip-flop may be stored in the two MTJ devices during a store operation. During a read operation, the D flip-flop outputs the state of the two MTJ devices. Read disturbances are mitigated with the use of an edge detector coupled to the output node, so that a LOW voltage is provided to the D flip-flop if a rising voltage at the output node is detected.