Magnetic Tunnel Junction Structure for Lower STT-MRAM Leakage

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The performance of spin-transfer torque magnetic random-access memory (STT-MRAM) is limited by high leakage current due to the magnetic tunnel junction layer being coplanar with the electrode layers, leading to small resistance value differences between memory states, which affects memory state reliability.

Innovation Solution

The semiconductor structure includes openings that expose portions of the upper and lower surfaces of the magnetic tunnel junction layer, preventing current from flowing directly through coplanar edges, thereby increasing the current flow path and resistance, reducing leakage current and improving memory state reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the magnetic tunnel junction layer is coplanar with the electrode layers, then the structure is simple and easy to manufacture, but the leakage current is high and the resistance value difference between memory states is small

Engineering Contradiction:
Improvestructural simplicityVSAvoidmemory state reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent introduces openings that extend in the lateral dimension (parallel to substrate surface) from the sidewalls toward the center, and optionally vertical openings, creating a three-dimensional structure. This dimensional change increases the current flow path length through the magnetic tunnel junction layer, thereby increasing resistance and reducing leakage current while maintaining manufacturing feasibility through standard etching processes

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If openings are formed to expose portions of the magnetic tunnel junction layer, then the leakage current is reduced and resistance value difference is enhanced, but the device complexity increases

Engineering Contradiction:
Improvememory state reliabilityVSAvoidstructural complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the electrode layers by forming openings in them, which divides the continuous electrode structure into multiple parts. This segmentation exposes portions of the magnetic tunnel junction layer and increases the current flow path, thereby reducing leakage current and enhancing the resistance value difference between memory states, while the segmented structure can be implemented using standard photolithography and etching processes

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The structure enhances the resistance value difference of the magnetic tunnel junction layer under different memory states, improving the performance and reliability of the STT-MRAM by increasing the current flow path and reducing leakage current.

Implementation Method 1

spin-transfer torque magnetic random-access memory (STT-MRAM), which implements information write through spin current

Methodology Applied
Scientific EffectSpin transfer torque:

Implementation Method 2

the magnetization direction of the free layer may be changed to be in parallel with the magnetization direction of the fixed layer (logic '0' state), and the magnetic tunnel junction is in a low resistance state; or the magnetization direction of the free layer may be changed to be in anti-parallel with the magnetization direction of the fixed layer (logic '1' state), and the magnetic tunnel junction is in a high resistance state

Methodology Applied
Scientific EffectMagnetoresistance: Magnetoresistance

Data Source

PatentUS12096696B2Semiconductor structure and fabrication method thereof
Publication Date: 2024.09.17 SEMICON MFG INT (SHANGHAI) CORP
  • US12096696B2 patent drawing
  • US12096696B2 patent drawing
  • US12096696B2 patent drawing

AI summary

A semiconductor structure and a fabrication method of the semiconductor structure are provided in the present disclosure. The semiconductor structure includes a base substrate, a bottom electrode layer on the substrate, a magnetic tunnel junction layer on the bottom electrode layer, and a top electrode layer on the magnetic tunnel junction layer. An opening is formed at least exposing a portion of one of an upper surface and a lower surface of the magnetic tunnel junction layer.