MTJ Via Structure Using ALD for Seamless Conductivity

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Solution Overview

Problem

The field of magnetoresistive devices, particularly magnetic tunnel junctions (MTJs), faces challenges in fabricating small vias with uniform conductivity and structural integrity for higher memory density, as conventional methods struggle to fill trenches with small aspect ratios without seams or structural damage.

Innovation Solution

The use of atomic layer deposition (ALD) and selective ALD processes to form transition metal and tantalum-rich layers within trenches, followed by polishing to create vias that facilitate the integration of MTJs with improved electrical performance and structural integrity, allowing for bidirectional current transfer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional deposition methods are used to fill trenches for vias, then the process is simpler and faster, but the vias have seams and structural damage that reduce conductivity and reliability

Engineering Contradiction:

Improvevia structural integrityVSAvoiddeposition process complexity

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The via filling process is segmented into multiple sequential deposition steps (first conductive layer, second conductive layer, third conductive layer) rather than using a single conventional deposition method. This segmentation allows each layer to be optimized for specific functions, eliminating seams and structural damage while maintaining manufacturing feasibility through systematic process breakdown

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The deposition parameters are changed between layers, using different materials (tungsten, copper, cobalt, ruthenium) and different deposition techniques for each layer. This parameter variation optimizes each layer's properties to achieve seamless filling and superior via structural integrity compared to conventional single-method deposition

Inventive Principle:

Principle #35Parameter changes

2Reliability

If larger vias are used, then structural integrity is easier to achieve, but memory density decreases

Engineering Contradiction:

Improvevia conductivityVSAvoidmemory density

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The via structure uses composite materials with multiple conductive layers (tungsten, copper, cobalt, ruthenium) instead of a single material. This composite approach enables smaller via dimensions while maintaining structural integrity and conductivity, thereby increasing memory density without sacrificing reliability

Inventive Principle:

Principle #40Composite materials

Solution Approach 2:

Multiple conductive layers are nested within each other to form the via structure, with each layer contained within the previous one. This nesting approach allows efficient use of space in smaller vias, achieving high conductivity and structural integrity while maximizing memory density

Inventive Principle:

Principle #7Nested doll (Nesting)

3Manufacturing precision

If multiple deposition layers are used to fill trenches, then via conductivity and structural integrity improve, but the manufacturing process becomes more complex

Engineering Contradiction:

Improvevia uniform conductivityVSAvoiddeposition process steps

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The complex deposition process is segmented into distinct, well-defined layers (first, second, third conductive layers) with specific materials and functions for each. This segmentation manages complexity by organizing the multi-step process into manageable units, achieving uniform conductivity through systematic layer-by-layer construction

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Each deposition layer is designed with local quality optimized for its specific function and location within the via. Different materials and deposition parameters are applied to different layers based on their specific requirements, achieving uniform overall conductivity while managing process complexity through localized optimization

Inventive Principle:

Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enables the fabrication of small vias with seamless conductivity and enhanced structural integrity, supporting higher memory density and efficient integration of magnetoresistive devices.

Implementation Method 1

The use of atomic layer deposition (ALD) and selective ALD processes to form transition metal and tantalum-rich layers within trenches

Methodology Applied

Scientific EffectAtomic layer deposition: Chemical Vapour Deposition

Data Source

PatentEP4336991B1Method for manufacturing a magnetoresistive memory device

Publication Date: 2026.04.01 EVERSPIN TECHNOLOGIES INC

Figure 1A~1C
Figure 2A~2C
Figure 2D~3B

AI summary

Fabrication of a magnetic memory element, including a via (125) in an interlevel dielectric layer (120), providing an electrical connection between an underlying metal region (110) and a magnetoresistive stack device, such as a magnetic tunnel junction (150), involves forming a transition metal layer (130) in the via by atomic layer deposition. The via optionally includes a tantalum-rich layer (140) above, and/or a cap layer (115) below, the transition metal layer, and may have a diameter less than or equal than a diameter of the magnetoresistive stack device.