Multi-Bias Core Level Shifter for Dual Pad Voltage Switching
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Solution Overview
Problem
Integrated circuit devices face challenges in supporting multiple pad voltage levels due to limitations in process technology, which restrict the use of higher voltage transistors and hinder efficient operation across different voltage domains, particularly in translating digital logic signals between low and high voltage ranges.
Innovation Solution
A dual-voltage output level shifting circuit is implemented, utilizing a combination of low-voltage and high-voltage sections with output transistors and biasing circuits to manage voltage transitions, ensuring the bias is modified during signal transitions, thereby avoiding overstress on low-voltage transistors and enabling efficient operation across 0.9V, 1.2V, and 1.8V voltage levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If higher voltage transistors are used to support multiple pad voltage levels, then voltage level compatibility is improved, but process technology limitations and device complexity increase
Solution Approach 1:
The output driver is divided into separate low voltage section and high voltage section, with dedicated transistors for each voltage domain. This segmentation allows each section to be optimized for its specific voltage level without requiring higher voltage transistors throughout the entire circuit, thus maintaining voltage level compatibility while avoiding process technology limitations.
Solution Approach 2:
A level shifting circuit is introduced as an intermediary between the low voltage core logic and high voltage I/O circuits. This level shifter translates voltage levels dynamically, enabling compatibility across multiple voltage domains without requiring the core logic to support higher voltages directly.
2Stability of the object's composition
If bias is maintained constant during signal transitions, then circuit stability is improved, but transistor overstress occurs during high-frequency operation
Solution Approach 1:
The biasing circuit is made dynamic by coupling the output signal back to the biasing network through capacitive coupling. This allows the bias to automatically adjust during signal transitions, providing enhanced drive strength when needed while maintaining stability during steady-state operation, thus preventing transistor overstress during high-frequency switching.
Solution Approach 2:
The output signal is fed back to the biasing circuit through capacitive coupling, creating a feedback mechanism that dynamically adjusts the bias level based on the output signal state. This feedback ensures the bias adapts to transition conditions, preventing overstress while maintaining circuit stability.
3Adaptability or versatility
If transistor size is increased to support high voltage operation, then voltage level handling capability is improved, but circuit area and power consumption increase
Solution Approach 1:
By segmenting the output driver into low voltage and high voltage sections with dedicated transistors for each, the circuit can handle multiple voltage levels without requiring oversized transistors. Each transistor is sized appropriately for its specific voltage domain, minimizing total circuit area while maintaining voltage level handling capability.
4Adaptability or versatility
If intermediate voltage supplies are added to support multiple voltage domains, then voltage level translation capability is improved, but power supply complexity and device area increase
Solution Approach 1:
The level shifting circuit acts as an intermediary that enables voltage level translation between low voltage core logic and high voltage I/O circuits without requiring intermediate voltage supplies. The level shifter dynamically translates voltage levels using the available supply voltages, avoiding the need for additional power supply rails and reducing power supply complexity.
Data Source
AI summary
An output driver in an integrated circuit includes a voltage shifter. The output driver has a low voltage section configured to provide a low voltage signal responsive to an input signal and a high voltage section configured to provide a high voltage signal responsive to the input signal. A first biasing circuit is configured to provide a bias to a first transistor in the high voltage section such that the bias is modified during a transition in the output signal. A second biasing circuit is configured to turn on a second transistor in the high voltage section when the output signal is at a low voltage level. The second transistor is configured to discharge a terminal of the first transistor. The input signal switches between 0 Volts and 0.9 Volts. The output signal switches between 0 Volts and 1.2 Volts or between 0 Volts and 1.8 Volts.