Multi-Bias Current Conveyor for Accurate Pulsed Current Mirroring
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Solution Overview
Problem
Conventional current conveyors face challenges in accurately mirroring input currents across a range of amplitudes due to dynamic effects such as transistor operation in linear regions, leading to inaccurate current mirroring and charge loss, especially when handling bidirectional pulsed currents.
Innovation Solution
A multi-bias mode current conveyor is introduced, featuring a biasing circuit that selectively applies different voltage levels to cascode stages based on the amplitude of the input current, maintaining transistors in saturation regions to minimize dynamic effects and improve current mirroring accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If conventional current conveyors are used to handle bidirectional pulsed currents, then the device can operate with simple biasing, but current mirroring accuracy deteriorates due to transistors operating in linear regions
Solution Approach 1:
The patent implements dynamic biasing where the bias voltage level changes based on the amplitude of the input current signal. The biasing circuit transitions from a static configuration to a dynamic one that adapts to signal conditions, keeping transistors in saturation region across varying current amplitudes to maintain mirroring accuracy without excessive complexity
Solution Approach 2:
The patent changes the bias voltage parameter dynamically based on input current amplitude. By adjusting the bias voltage level according to signal strength, the operating region of transistors is maintained in saturation, improving current mirroring accuracy while managing device complexity through parameter adaptation
2Ease of operation
If fixed bias voltage is applied to cascode stages, then the circuit operation is simplified, but current mirroring accuracy deteriorates across varying current amplitudes
Solution Approach 1:
The patent transforms the static bias voltage into a dynamic parameter that adjusts with input signal amplitude. This dynamic approach maintains transistor saturation across different operating conditions, improving current mirroring accuracy while preserving relative operational simplicity through automated adaptation
Solution Approach 2:
The patent implements a feedback mechanism where the biasing circuit monitors input current amplitude and adjusts bias voltage accordingly. This feedback loop ensures transistors remain in saturation region, maintaining high current mirroring accuracy across varying signal conditions while keeping the circuit operationally simple
3Adaptability or versatility
If transistors operate in linear regions to handle large current amplitudes, then the device can process higher current signals, but current mirroring accuracy and charge conservation deteriorate
Solution Approach 1:
The patent dynamically changes the bias voltage parameter to maintain transistor saturation across a wide range of current amplitudes. By adjusting this key parameter, the circuit achieves both high adaptability to different signal levels and high current mirroring accuracy, preventing operation in the problematic linear region
Data Source
AI summary
One or more embodiments relate to a multi-bias mode current conveyor. Such a current conveyor may include an input terminal, a reference terminal, an output terminal, a first and second cascoded current mirrors, and a biasing circuit. The first cascoded current mirror and a second cascoded current mirror may be arranged as a current conveyor that is configured to provide an output current that a mirror of an input current. The biasing circuit may be configured to provide a bias voltage selectively exhibiting a first voltage level or a second voltage level. The bias voltage may be provided at least partially responsive to a state of the input current. The biasing circuit may be arranged to apply the bias voltage to at least one of the first cascoded current mirror or the second cascoded current mirror.