A switched divider and buffer circuit adapts reference voltage to supply changes, keeping cascode MOS transistors within safe limits.
A switched capacitor in the amplifier feedback path corrects input offset voltage to keep the reference voltage stable across temperature.
Two autonomous current stages decouple DC and modulated components, improving feedback-loop stability and avoiding hump-induced restarts.
Lossless current sensing and offset correction let paralleled LDOs share load evenly without extra power or degraded regulation.
Automatic zeroing and software-based level correction improve invasive pressure monitoring accuracy while reducing setup time and contamination risk.
A dropout detector triggers amplifier bias boost pulses to speed voltage recovery while limiting damaging overshoot in regulators.
Minimal MOS test stacks verify reference voltage startup with binary signals, reducing start check circuit area and complexity.
A two-stage amplifier with positive and negative feedback expands LDO bandwidth while preserving phase margin to improve PSRR and suppress noise.
Bias-controlled current mirroring and a diode-connected MOSFET remove resistor and mobility variation effects in threshold voltage sensing.
A matched replica transistor and feedback loop stabilize load bias current across PVT variation while isolating supply noise and cutting power use.
A negative feedback path and current limiting component raise transconductance during large input differences while keeping quiescent current low.
Uses transistors, resistors, and a small capacitor to shift poles and zeros, stabilizing feedback circuits without hard-to-integrate large capacitors.
A PMOS-based voltage adjustment stage compensates process corners to narrow buffer trigger voltage variation without adding latency.
Dynamic bias switching keeps cascode transistors in saturation, improving bidirectional pulsed current mirroring and reducing charge loss.
Averaged current mirroring and amplifier feedback stabilize bandgap voltage across supply and temperature ranges while keeping quiescent current low.
A segmented PMIC and voltage amplifier approach enables rapid 5G RF voltage switching while limiting in-rush current and ripple.
An attenuated mirrored load current is filtered and re-injected to smooth overshoot events without faster amplifiers or higher power draw.
A self-stabilized secondary amplifier simplifies LDO frequency compensation, avoiding external capacitors while keeping ripple low.