Multi-Bit OTPROM Using GAAFET Nanowire Channel Breaking
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current One Time Programmable Read Only Memory (OTPROM) technologies are limited to single-bit programming, which constrains logic programming in electronics and fails to adequately protect data confidentiality, as they can only represent bits as '0' or '1', lacking multi-bit functionality.
Innovation Solution
The development of a multi-bits read only memory operation method utilizing a Gate-All-Around FET (GAAFET) structure with M nanowire channels, where a conductive gate and ion-doped electrodes control the state of nanowire channels to represent multiple programmable bits, allowing for M+1 states by breaking i nanowire channels, enabling 2M types of programmed variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If OTPROM uses single-bit programming with fusing or anti-fusing, then manufacturing cost is reduced and information stability is improved, but data confidentiality protection is weakened and logic programming capability is limited
Solution Approach 1:
The patent segments a single memory cell into multiple independent nanowire channels (M channels), where each channel can be independently programmed to represent a bit. This segmentation allows the memory cell to store M bits simultaneously, transforming a single-bit storage unit into a multi-bit storage unit while maintaining the irreversible programming characteristic of OTPROM
Solution Approach 2:
The patent transitions from single-bit to multi-bit programming by adding the dimension of multiple nanowire channels within a single memory cell. Instead of using multiple memory cells to achieve multi-bit storage, the invention stacks multiple channels in a vertical or integrated configuration, achieving multi-bit functionality within the same physical footprint
2Ease of manufacture
If OTPROM is programmed with single-bit values ('0' or '1'), then manufacturing simplicity is maintained, but data confidentiality protection is insufficient
Solution Approach 1:
By dividing the memory cell into M separable nanowire channels that can be independently programmed, the system achieves multi-bit storage capability. Each channel can be broken or left intact to represent binary states, allowing M bits to be stored in parallel within a single cell structure
Solution Approach 2:
The patent makes the memory cell universal by enabling it to perform both single-bit and multi-bit programming operations. The same physical structure can be configured to store M different bit patterns, providing versatile data storage capability while maintaining the simplicity of irreversible programming through fuse breaking
3Adaptability or versatility
If multi-bits read only memory uses M nanowire channels in GAAFET structure, then multi-bit programming capability and data protection are enhanced, but device complexity increases
Solution Approach 1:
The patent merges M nanowire channels and their associated control mechanisms into a single integrated GAAFET structure. The gate wraps around all M channels, providing unified control while maintaining individual channel programmability. This merging reduces the overall device complexity compared to using M separate transistor structures
Solution Approach 2:
The GAAFET structure implements a nested configuration where the gate is positioned to surround and control multiple nanowire channels. The channels are nested within the gate structure, allowing compact integration of M channels while maintaining individual access and control through the common gate mechanism
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances data protection and confidentiality by allowing multi-bit programming, minimizing memory dimensions to less than 5 nanometers, and applies to advanced and consumer electronics, overcoming the limitations of single-bit programming in existing OTPROM technologies.
Implementation Method 1
A multiplicity of M nanowire channels are electrically connecting between the first electrode and the second electrode
Implementation Method 2
Each bit of the memory cell of OTPROM may be programmed by altering a state of a fuse corresponding to each of the bits. Once altered, OTPROM remains unchanged forever in electronics
Data Source
AI summary
An operation method of a multi-bits read only memory includes a step of applying a gate voltage to a conductive gate, a first voltage to a first electrode, and a second voltage to a second electrode. The multi-bits read only memory includes a substrate and a transistor structure with the conductive gate mounted between the first electrode and the second electrode. A multiplicity of M nanowire channels is mounted between the first electrode and the second electrode, and M is a positive integer greater than one. The operation method breaks multiple states of the multi-bits read only memory. The multiple states are programmable and include an ith state, and 1≤ i≤ M. The aforementioned states allow storage of multiple bits on the read only memory, instead of just storing a single bit on the read only memory.