Multi-bit Test Control Circuit Using Delayed Single Source Signal
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Solution Overview
Problem
Conventional multi-bit test control circuits for semiconductor devices require multiple source signals and complex control logics, making it difficult to secure timing margins and simplify the control operations, especially during bank interleaving operations.
Innovation Solution
A multi-bit test control circuit that combines a single source signal with a delayed signal to generate pulse signals, which are then used to create control signals for bank interleaving operations, reducing the need for multiple source signals and simplifying control logics by ensuring timing margins and generating efficient control signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple source signals are used for bank interleaving test operations, then test control precision is improved, but device complexity and difficulty of detecting and measuring increase
Solution Approach 1:
The patent combines multiple source signals (PINB_BK0, PINB_BK1, PINB_BK2, PINB_BK3) into a single source signal (PINB) through signal merging. The control circuit generates different control signals for different banks by delaying the single source signal differently, eliminating the need for separate source signals for each bank while maintaining precise test control.
Solution Approach 2:
The single source signal (PINB) serves multiple functions by being differently delayed to generate control signals for different banks. The same source signal is used to control both the data output enable signals (IOFIX) and the test start signals (IOSTB_TGO) for all banks, making it a universal control signal that performs multiple control functions.
2Measurement precision
If multiple source signals are used for bank interleaving test operations, then test control precision is improved, but difficulty of detecting and measuring increases
Solution Approach 1:
By merging multiple source signals into one, the patent reduces the number of timing relationships that need to be detected and measured. Instead of monitoring multiple independent source signals and their timing relationships, the system only needs to monitor the single source signal and its delayed versions, simplifying timing margin detection.
3Device complexity
If a single source signal is used for all banks, then device complexity is reduced, but timing margin security becomes difficult
Solution Approach 1:
The patent applies preliminary action by generating delayed versions of the single source signal before using them as control signals. The delay units (DLY_PIN_BK1, DLY_PIN_BK2, DLY_PIN_BK3) create time-shifted copies of the source signal, ensuring that control signals for different banks are activated at appropriate times relative to each other, thus securing timing margins.
Solution Approach 2:
The delay units act as intermediaries between the single source signal and the control signals for different banks. These intermediaries (delay units) process the source signal by introducing controlled delays, thereby mediating the timing relationships and ensuring reliable operation while maintaining simplicity.
4Reliability
If control signals are generated using delayed source signals, then timing margins are improved, but device complexity increases
Solution Approach 1:
The delay units are configured to delay the source signal by predetermined time periods before generating control signals. This preliminary delay action ensures that control signals for different banks are properly timed relative to each other, securing timing margins while using simple delay circuitry rather than complex timing control logic.
Data Source
AI summary
A multi-bit test control circuit includes an operation unit, a delay unit, and a generation unit. The operation unit is configured to combine a single source signal inputted to each bank with a delay signal generated by delaying the source signal by a certain time to generate a first pulse signal. The delay unit is configured to delay the first pulse signal by a certain time. The generation unit is configured to combine an output signal of the operation unit with an output signal of the delay unit to generate a second pulse signal for a bank interleaving multi-bit test.