Recessed Source/Drain Contacts in Multi-Bridge FETs for Lower Resistance
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Solution Overview
Problem
As semiconductor devices become smaller, filling the reduced electrical contact points with semiconductor material becomes difficult, leading to challenges in achieving improved electrical characteristics, particularly in forming logic-contact structures like metal silicide at the bottom of semiconductor features.
Innovation Solution
A metal-semiconductor compound, such as titanium silicide, is used to form a metal-semiconductor layer that fills the recess in the semiconductor device, reducing the ratio of high-resistance barrier layers and improving contact resistance by being thicker only in the recess region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the electrical contact point size is reduced to meet smaller semiconductor device design constraints, then device integration and miniaturization are improved, but filling the contact point with semiconductor material becomes difficult and contact resistance increases
Solution Approach 1:
The patent applies local quality by creating a recess region specifically at the contact point area with different dimensions than the surrounding source/drain region. The recess has a larger cross-sectional area at its bottom compared to the contact point opening, allowing better material filling only where needed while maintaining small overall device dimensions. This resolves the contradiction by improving filling precision locally without increasing overall contact point size.
Solution Approach 2:
The patent introduces a vertical dimension solution by creating a recess with controlled depth and cross-sectional area variation through the thickness of the source/drain region. The recess extends to a first depth from the upper surface, with its cross-sectional area changing from a first value at the opening to a second value at the bottom. This dimensional approach allows the contact point to remain small at the surface while providing adequate filling volume at depth, resolving the filling difficulty caused by miniaturization.
2Volume of moving object
If the contact point size is reduced for miniaturization, then device scaling is improved, but contact resistance increases due to difficulty in forming metal silicide at the bottom of semiconductor features
Solution Approach 1:
The recess structure creates a localized region with enhanced filling capability at the contact point bottom, ensuring adequate metal silicide formation only where contact resistance matters most. The varying cross-sectional area of the recess (larger at bottom, smaller at opening) allows sufficient material deposition at the critical bottom interface while maintaining small overall contact dimensions, thus reducing contact resistance without sacrificing miniaturization.
Solution Approach 2:
The recess structure is formed in advance before the metal silicide deposition process. By pre-configuring the recess with its specific depth and cross-sectional area profile, the patent ensures that the subsequent metal silicide layer can be properly formed at the bottom of the contact point. This preliminary structural preparation resolves the reliability issue by guaranteeing adequate material presence at the critical contact interface before the actual contact formation process.
Data Source
AI summary
The present disclosure provides a semiconductor device. The semiconductor device includes an active region, a plurality of channel layers, gate electrodes, a source/drain region, and a contact structure. The active region is disposed on a substrate and extends in a first direction. The plurality of channel layers are disposed on the active region to be spaced apart from each other vertically. The gate electrodes are disposed on the substrate, intersecting the active region and the plurality of channel layers, extending in a third direction, and surrounding the plurality of channel layers. The source/drain region is disposed on the active region on at least one side of the gate electrodes, and contacting the plurality of channel layers. The contact structure is disposed between the gate electrodes, extending in the second direction, and contacting the source/drain region.