Multi-channel Memory Module with Segmented Contact Rows

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Solution Overview

Problem

Current computing systems face limitations in memory bandwidth due to the constraints of traditional single-channel memory modules, which restrict performance and require additional costs and signal integrity challenges when attempting to increase frequency or add data buffers.

Innovation Solution

The implementation of multi-channel memory modules with multiple rows of conductive contacts allows for the connection of multiple channels to a single memory module, enabling increased bandwidth without the need for additional data buffers or higher operating frequencies, and using a shared power management integrated circuit and registered clock drivers to manage signal integrity across channels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional single-channel memory modules are used, then device complexity is low, but memory bandwidth is limited

Engineering Contradiction:
Improvememory bandwidthVSAvoidmemory module structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The memory module is segmented into multiple independent channel groups, where each group contains separate conductive contacts that can be independently connected to memory channels. This segmentation allows the module to support multiple channels simultaneously, increasing bandwidth while maintaining manageable complexity through modular organization

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent extends the traditional single-row contact arrangement into multiple rows of conductive contacts arranged in different dimensions on the memory module. This dimensional expansion enables simultaneous connection to multiple memory channels, effectively increasing bandwidth without proportionally increasing overall module complexity

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If operating frequency is increased to boost bandwidth, then memory bandwidth improves, but signal integrity deteriorates

Engineering Contradiction:
Improvememory bandwidthVSAvoidsignal integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

Signal paths are segmented into separate channel groups with dedicated conductive contacts, isolating signal interference between channels. This segmentation maintains signal integrity by preventing cross-channel interference even at high operating frequencies, while still achieving increased bandwidth through parallel channel operation

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces intermediate structures such as separate contact rows and channel grouping mechanisms that act as mediators between the memory controller and memory devices. These intermediaries help maintain signal integrity by providing dedicated pathways for each channel, reducing signal degradation and interference at high frequencies

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If data buffers are added to increase bandwidth, then memory bandwidth improves, but manufacturing cost increases

Engineering Contradiction:
Improvememory bandwidthVSAvoidmanufacturing cost
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The memory module uses segmented contact rows that can be directly connected to multiple memory channels without requiring additional data buffer components. This segmentation approach achieves bandwidth increase through structural configuration rather than additional active components, reducing manufacturing complexity and cost

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent extracts the need for additional data buffers by using multiple rows of conductive contacts that can directly interface with multiple memory channels. This extraction eliminates unnecessary components while maintaining the bandwidth enhancement goal, thereby reducing manufacturing cost and simplifying the bill of materials

Inventive Principle:
Principle #2Taking out (Extraction)

4Productivity

If multiple channels are connected to a single memory module, then memory bandwidth increases, but signal integrity management becomes more difficult

Engineering Contradiction:
Improvememory bandwidthVSAvoidsignal management complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The conductive contacts are segmented into distinct rows that correspond to different channel groups, with each row independently connectable to specific memory channels. This segmentation simplifies signal management by providing clear physical separation and organization of signal paths, making it easier to manage multiple channels while maintaining signal integrity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the memory module are assigned different functional qualities, with specific contact rows dedicated to specific channel groups. This local quality assignment optimizes signal routing for each channel group independently, simplifying the management of multiple channels while maintaining overall system performance and signal integrity

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20230044892A1Multi-channel memory module
Publication Date: 2023.02.09 INTEL CORP
  • US20230044892A1 patent drawing
  • US20230044892A1 patent drawing
  • US20230044892A1 patent drawing

AI summary

According to examples, a memory module with module rows of conductive contacts can enable multiple memory channels to be connected to the same memory module. In one example, a memory module includes a printed circuit board (PCB) having a first face, a second face, and an edge to be received by a connector. The memory module includes a plurality of memory chips on at least one of the first and second faces of the PCB. The memory module includes two or more rows of conductive contacts on each of the first and second faces of the PCB, the two rows including a first row of conductive contacts proximate to the edge of the PCB to be received by the connector, and a second row of conductive contacts between the first row and a second edge of the PCB opposite to the first edge.