Multi-Core Processor Power Management via Interrupt Domain Mapping
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Solution Overview
Problem
Existing power management techniques in multi-core systems are inefficient in transitioning from high to optimal performance points upon wake-up events, leading to unnecessary power consumption in battery-powered devices.
Innovation Solution
The method involves grouping wake-up sources into computing domains, mapping these domains to specific core states, and configuring cores to enter the appropriate states upon interrupt, thereby optimizing power usage by intelligently managing core states and voltage/frequency levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the processor core transitions to a high performance point upon wake-up events, then the system can handle any potential workload, but the power consumption increases unnecessarily when the workload demand is low
Solution Approach 1:
The patent applies local quality by differentiating the performance state of each processor core based on the specific interrupt source that triggered the wake-up event. Instead of uniformly transitioning all cores to high performance state, the system maps specific interrupt sources to specific computing domains, and each domain is associated with appropriate performance states. This allows only the necessary cores to activate at appropriate performance levels, reducing unnecessary power consumption while maintaining adequate handling capability for the specific workload at hand.
Solution Approach 2:
The patent implements dynamics by making the processor core performance state adaptive and changeable based on real-time interrupt source identification. The system dynamically determines the appropriate performance state by identifying the interrupt source, mapping it to a computing domain, and selecting the corresponding performance state from a predefined set. This dynamic adaptation allows the system to transition from static high-performance state to optimized performance states that match the actual workload requirements.
2Use of energy by moving object
If the processor core transitions from high performance point to optimal performance point, then power consumption is reduced, but the transition time and complexity increase
Solution Approach 1:
The patent applies preliminary action by pre-establishing the mapping relationships between interrupt sources, computing domains, and performance states before the system operates. The interrupt source to computing domain mapping and the computing domain to performance state mapping are configured in advance, creating a ready-to-use lookup structure. When an interrupt occurs, the system can quickly identify the interrupt source and retrieve the pre-determined optimal performance state without performing complex real-time analysis, thus minimizing transition time while achieving power optimization.
Solution Approach 2:
The patent implements feedback by using the interrupt source information to determine the appropriate performance state transition. The system receives feedback from the interrupt controller about which interrupt source triggered the wake-up event, and uses this feedback to select the corresponding computing domain and performance state. This feedback mechanism ensures that the performance state transition is both rapid and accurate, matching the actual workload requirements without unnecessary transitions.
3Use of energy by moving object
If secondary cores are put into sleep state to save power, then energy consumption is reduced, but the wake-up and state transition efficiency decreases
Solution Approach 1:
The patent applies local quality by selectively managing the state of each secondary core based on the specific interrupt source. Instead of uniformly keeping all secondary cores in sleep state or transitioning them all to the same state, the system identifies which computing domain the interrupt belongs to and activates only the necessary cores with appropriate performance states. This selective approach minimizes the number of cores that need to wake up and transition, improving overall wake-up efficiency while maintaining power savings for inactive cores.
4Measurement precision
If the system uses detailed interrupt source mapping to computing domains, then power management precision is improved, but the system complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the interrupt sources into distinct computing domains based on their functional characteristics and workload requirements. Each computing domain is associated with specific performance states, creating a structured mapping hierarchy. This segmentation organizes the complexity into manageable segments, where each domain has predefined performance state mappings. The segmentation approach maintains high precision in power management by preserving the detailed mapping relationships while making the system more organized and easier to manage through domain-based categorization.
Data Source
AI summary
A method is provided for resuming one or more cores of a multi-core processor that is part of an electronic device, the method comprising: grouping wakeup sources into a plurality of computing domains; receiving an interrupt associated with a wakeup source; identifying a first computing domain from the plurality that the wakeup source is part of; mapping the first computing domain to a first indication of one or more states of a first core of the processor; configuring the first core to enter the one or more states that are indicated by the first indication; and resuming the first core after the first core is configured.