Multi-Die Memory Package Interconnection for Higher Yield
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Solution Overview
Problem
The integration of multiple channels on a single die in semiconductor devices increases die size, leading to decreased density and yield, resulting in higher production costs due to lower availability of connection terminals on edges.
Innovation Solution
A semiconductor device design featuring two independent dies, each connected to a separate channel, with an interconnection circuit between them to facilitate signal transfer, allowing for the same memory operations as a 2-channel mono die configuration while maintaining the same physical size and storage capacity as a single die.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple channels are integrated on a single die, then multi-channel memory operations are achieved, but die size increases leading to decreased density and yield
Solution Approach 1:
The patent divides the multi-channel memory system into multiple separate dies, with each die handling a specific channel. This segmentation allows each die to maintain a manageable size while collectively providing multi-channel functionality, thereby avoiding the density and yield issues associated with integrating all channels on a single large die.
Solution Approach 2:
The patent transitions from a planar integration approach (multiple channels on one die) to a three-dimensional package structure where multiple dies are stacked vertically. This dimensional change enables multi-channel operation without increasing the lateral die size, maintaining high density and yield.
2Adaptability or versatility
If multiple channels are integrated on a single die, then multi-channel memory operations are achieved, but yield decreases due to lower availability of connection terminals on edges
Solution Approach 1:
By segmenting the multi-channel system into separate dies, each die can be optimized with adequate edge terminals for reliable connections. This avoids the terminal scarcity problem that would occur on a single large die where edge-to-area ratio is reduced, thereby maintaining high yield.
3Adaptability or versatility
If multiple channels are integrated on a single die, then multi-channel memory operations are achieved, but production cost increases due to decreased yield
Solution Approach 1:
Segmenting the system into multiple smaller dies improves manufacturing yield by ensuring each die has sufficient edge terminals for reliable connections. Although multiple dies are used, the overall production cost is reduced compared to manufacturing large low-yield single-die multi-channel devices.
Solution Approach 2:
Multiple separate dies are merged into a single functional unit through advanced packaging techniques. This merging provides multi-channel functionality while maintaining manufacturing efficiency and acceptable production costs through improved yield.
Data Source
AI summary
A semiconductor device includes a first die connected to a first channel, the first die comprising a first memory chip; and a second die connected to a second channel, the second die comprising a second memory chip, the first and second channels being independent of each other and a storage capacity and a physical size of the second die being the same as those of the first die. The first and second dies are disposed in one package, and the package includes an interconnection circuit disposed between the first die and the second die to transfer signals between the first memory chip and the second memory chip.