Multi-Die Package Structure With Thin Electrically Isolated Heat Path
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Solution Overview
Problem
Existing solutions for heat dissipation in semiconductor packages, such as using a metal heat sink coupled with a thermal interface material (TIM), face challenges like limited thermal conductivity, significant thickness, and the inability to couple multiple dies without risking electrical shorts.
Innovation Solution
The proposed solution involves a semiconductor package design that includes a substrate with a conductive terminal, multiple semiconductor dies with circuitry on their device sides, and adhesive layers on their non-device sides. A passivation overcoat (PO) layer contacts the adhesive layers, and a semiconductor layer is exposed to the exterior, facilitating efficient heat dissipation through a thin heat dissipation member (HDM) that maintains electrical isolation between dies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If a metal heat sink coupled with thermal interface material (TIM) is used for heat dissipation, then heat dissipation capability is improved, but thermal resistance increases and the structure becomes thicker
Solution Approach 1:
The patent extracts the heat dissipation function from the traditional metal heat sink TIM structure and integrates it directly into the substrate through embedded conductive members. This eliminates the need for separate heat sink and TIM components, reducing thermal interface resistance and overall thermal resistance while maintaining effective heat dissipation capability.
Solution Approach 2:
The patent merges the heat dissipation function with the substrate structure by embedding conductive members directly into the substrate. This integration combines the substrate and heat dissipation pathway into a unified structure, eliminating thermal interface resistance between separate components and reducing overall thermal resistance.
2Adaptability or versatility
If multiple semiconductor dies are coupled to a substrate, then device functionality is improved, but electrical shorts between dies may occur
Solution Approach 1:
The patent uses adhesive layers as intermediary materials between adjacent semiconductor dies. These adhesive layers provide electrical isolation between the dies while allowing thermal conduction, preventing electrical shorts between multiple dies coupled to the substrate while maintaining device functionality.
Solution Approach 2:
The patent applies different material properties to different regions: the adhesive layers between dies have high electrical resistance for isolation but adequate thermal conductivity for heat dissipation, while the embedded conductive members in the substrate have high thermal conductivity for heat transfer. This local differentiation of material properties enables both electrical isolation and thermal management.
3Temperature
If traditional heat dissipation structures are used, then heat dissipation is achieved, but the package size increases
Solution Approach 1:
The patent embeds conductive members within the substrate structure, nesting the heat dissipation pathway inside the existing package volume. This integration allows heat dissipation functionality to be incorporated without adding external bulk, maintaining compact package size while achieving effective heat dissipation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively reduces thermal resistance by 26%, allowing for increased die power or reduced die size while maintaining the same die temperatures, thus enhancing the package's thermal management capabilities.
Implementation Method 1
first and second adhesive layers contacting the first and second non-device sides, respectively
Implementation Method 2
a passivation overcoat (PO) layer contacting the first and second adhesive layers, and a semiconductor layer contacting the PO layer and exposed to an exterior of the package
Data Source
AI summary
In examples, a package comprises a substrate including a conductive member coupled to a conductive terminal, with the conductive terminal exposed to an exterior of the package. The package also includes a first semiconductor die having first device and first non-device sides, with the first device side coupled to the substrate and the first non-device side opposing the first device side, and with the first device side having circuitry formed therein. The package also includes a second semiconductor die having second device and second non-device sides, with the second device side coupled to the substrate and the second non-device side opposing the second device side, and with the second device side having circuitry formed therein. The package also includes first and second adhesive layers contacting the first and second non-device sides, respectively. The package also includes a passivation overcoat (PO) layer contacting the first and second adhesive layers, and a semiconductor layer contacting the PO layer and exposed to an exterior of the package.