Multi-Die IC Package With Queue Allocation For Signal Prioritization
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Solution Overview
Problem
The transition to smaller nanometer technologies in silicon processing leads to challenges such as pad-limited designs, incompatibility between low voltage high-speed digital logic and higher voltage interconnect technologies, and resource-intensive porting of high-speed analog interfaces, which hinder the implementation of dense digital logic and efficient integration of analog and digital circuits.
Innovation Solution
A package comprising multiple dies with a communication channel that decouples analog and digital blocks, allowing each die to operate with different voltage and transistor gate oxide thicknesses, and uses a universal interface for high-bandwidth, low-latency communication, enabling modular design and independent manufacturing of dies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If feature size in silicon technology is decreased to increase digital logic density, then digital logic area is reduced, but analog and I/O cells shrink less leading to pad-limited design
Solution Approach 1:
The patent divides the integrated circuit into multiple separate dies, with analog/RF circuits on one die and digital logic on another die. This segmentation allows each die to be optimized independently for its specific function and voltage requirements, resolving the contradiction between digital logic scaling and analog/I/O cell scaling limitations.
2Adaptability or versatility
If different voltage requirements are met for analog and digital circuits, then circuit functionality is improved, but integration complexity increases
Solution Approach 1:
The patent separates analog and digital circuits onto different dies with different voltage domains, eliminating the need for complex voltage regulation and isolation circuits that would be required if both were integrated on the same die. This segmentation resolves the contradiction by allowing voltage diversity while reducing integration complexity.
Solution Approach 2:
The patent introduces a voltage translator as an intermediary component at the interface between analog and digital dies, enabling voltage compatibility without requiring complex integration schemes. This mediator allows different voltage domains to communicate efficiently while maintaining the benefits of separate die design.
3Adaptability or versatility
If multiple signal types with different quality of service requirements are transmitted, then communication functionality is improved, but queue management complexity increases
Solution Approach 1:
The patent divides the communication interface into multiple separate queues, each dedicated to specific signal types with particular quality of service requirements. This segmentation of traffic flow into distinct queues simplifies the management of different signal types by providing dedicated transmission paths rather than requiring complex priority arbitration for all signals.
Data Source
AI summary
A package includes a first die and a second die. The dies are connected to each other through an interface. At least one of the first and second dies includes a plurality of signal sources, wherein each source has at least one quality of service parameter associated therewith, and a plurality of queues having a different priorities. A signal from a respective one of the signal sources is allocated to one of the plurality of queues in dependence on the at least one quality of service parameter associated with the respective signal source. The interface is configured such that signals from said queues are transported from one of said first and second dies to the other of said first and second dies.