Energy Efficient ICT TRIZ Cases

Dynamic replica management lowers energy use while a versioned store handles writes to maintain availability when servers enter low power states.

Varying the sampling rate via pseudo-random delays prevents alignment with software harmonics, ensuring accurate power consumption measurements.

Dynamic switching between linear and non-linear modes reduces out-of-band emissions while maintaining transmission power efficiency.

A multi-die package allocates signals to priority queues based on quality of service parameters for efficient transport across the interface.

Resistor networks enable FPGAs to handle MIPI protocols via LVDS, eliminating costly converter chips.

A load manager adjusts computing resource operational modes using dual thresholds to reduce electrical power consumption.

Hierarchical wearable processing unit distributes tasks across segmented processors to balance performance and power consumption.

A memory controller reuses reserved hibernation storage space for caching during normal operation.

Virtualized control threads traverse physical boundaries in multi-core processors to manage sub-processing elements across partitions.

A memory link architecture switches controllers to sleep mode when idle.

A register mapping technique uses a pool and state-based table to manage hardware thread access.

Standby power maintains a sleep mode in construction equipment controllers, enabling firmware updates and data access without engine operation.

An integrated multiple-port PHY device uses a digital switching circuit to connect a digital core to analog front ends for signal conversion.

A disc-in switch triggers USB interface activation upon media insertion, eliminating separate wiring for disc recognition in automotive systems.

Signalling minimum burst intervals and output rates in service information prevents buffer overflow while reducing mobile receiver power consumption.

A vehicle Ethernet management system uses defined power and sleep modes to reduce IP setting time.

A frame distributor selects physical links within an aggregated logical link to forward network frames across communication interfaces.

Low power devices act as intermediaries to draw extra host energy for peripherals while keeping total consumption within specification limits.

A right-to-use agent adjusts processor power states based on usage direction to manage energy consumption.

A touchscreen controller negotiates processing roles with a host processor based on input complexity.

A zone-based workload scheduling system allocates computational tasks to electronic devices based on aggregated cooling efficiency indicators.

A cache controller monitors higher-level structures to predict future data accesses and configures management mechanisms accordingly.

MAC layer frame scheduling prevents 2.4 GHz interference between collocated radios, maintaining sensitivity during simultaneous data traffic.

A memory controller pre-fetches pixel data into internal cache to lower power consumption.

Heartbeat signals traverse a token ring topology to detect standby interface failures and maintain connectivity.

Staged core activation minimizes guardband requirements and prevents malfunctions from sudden circuit activity spikes.

A vehicle call apparatus dynamically switches power between cellular and PCS wireless sections based on movement state to maintain connectivity.

Branch prediction logic estimates instruction cycles to dynamically suspend idle components, reducing power consumption during predicted idle periods.

Direct cache-to-cache transfers using handshaking signals reduce latency and power consumption by bypassing system memory in multicore systems.

A reconfigurable processor shares a coarse-grained array unit among execution units, reducing hardware complexity and power consumption.

A control system adjusts cooling fan speed based on memory interface operating margin.

A power management unit switches SSD interfaces to partial or slumber states during idle periods.

Segmented timer circuits interrupt high voltage unit power rapidly while delaying control unit shutdown, resolving CPU failure delays.

A portable memory map generation method uses symbolic descriptors to define target computer memory layouts without platform-specific linker tools.

Adding high throughput capability elements to beacon frames prevents collisions from PSMP and PCO operations while maintaining data integrity.

A multi-tier control network integrates power and data distribution through hub controllers to simplify wiring complexity.

A voltage supply control device switches semiconductor components between internal and external power modes using existing output connections.

A system dynamically selects expert policies based on monitored performance parameters to manage computer system operations.

A 2-column demultiplexer system drives LCD pixel columns to perform column inversion and reduce polarity switches.

Terminals generate random values and compare them with competitive indices from an access point to alleviate channel competition in dense WLAN environments.

A semiconductor device uses one input/output circuit to detect entry signals and block power to other physical medium attachment sub-layers.

Inrush current detection activates USB power path without CPU, reducing idle energy consumption while charging external devices.

Historical load profiles drive dynamic frequency adjustments in handheld multimedia processors, lowering power consumption while maintaining playback quality.

A base station arranges resource blocks for mobile devices using channel information obtained from relay nodes or secondary base stations.

An asynchronous clock domain adapter unit connects master and slave managers across separate power domains within a network-on-chip topology.

A dynamic voltage frequency controller adjusts supply voltage and clock frequency based on real-time timing margins.

Input-driven clock gating and bypass paths reduce power consumption in the multiplier unit by disabling components during simple operations.

Packet filtering allows a network controller to disconnect the main CPU, reducing consumption while maintaining responsiveness.

Segmented power circuits allow the main supply to stop while dedicated lines keep essential services active, reducing standby consumption below EU limits.