Virtualized Control Threads for Multi-Core Processor Partitioning
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Solution Overview
Problem
Symmetric multi-core processors (MCPs) suffer from low utilization and design inflexibility, leading to high power consumption and inefficiency due to unused sub-processing elements, which complicates optimization as processor dimensions increase.
Innovation Solution
The MCP is partitioned physically to allow virtualized control threads to traverse physical boundaries, enabling a smaller number of main processing elements to control groups of sub-processing elements across different partitions, optimizing hardware and compiler design complexity and power management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the MCP is physically partitioned with fixed MPE-SPE associations, then hardware design complexity is reduced, but utilization efficiency decreases and power consumption increases due to unused SPEs
Solution Approach 1:
The patent segments the control function by introducing virtualized control threads that are separate from physical MPEs. These virtualized threads can dynamically associate with different SPEs across physical partitions, allowing flexible resource allocation while maintaining simple physical partitioning. This resolves the contradiction by separating control logic from physical hardware boundaries.
Solution Approach 2:
The patent introduces virtualized control threads as an intermediary layer between MPEs and SPEs. This intermediary enables dynamic association and control across physical partitions without requiring complex direct wiring or control logic between every MPE-SPE pair, thus improving utilization while avoiding hardware complexity.
2Power
If more SPEs are added to increase computation capacity, then processing power increases, but power consumption increases due to continuous leakage current in stand-by SPEs
Solution Approach 1:
The patent implements dynamic association between virtualized control threads and SPEs, allowing the system to activate only the SPEs needed for current computational tasks. SPEs can be dynamically assigned and unassigned based on workload requirements, preventing continuous operation of stand-by SPEs and reducing leakage current losses while maintaining computation capacity.
3Productivity
If MPEs are increased to control more SPEs, then utilization efficiency improves, but device complexity and design difficulty increase
Solution Approach 1:
The patent creates virtualized copies of control threads that can be instantiated multiple times and associated with different SPEs. Instead of adding more physical MPEs, the system uses virtualized control thread copies that can dynamically manage multiple SPEs, improving utilization efficiency without increasing physical device complexity.
4Manufacturing precision
If physical partitions are fixed with specific MPE-SPE mappings, then manufacturing precision is improved, but adaptability decreases for different computational workloads
Solution Approach 1:
The patent adds a virtualization dimension to the physical partitioning structure. While physical partitions maintain precise, fixed MPE-SPE mappings for manufacturing simplicity, a second virtualization layer is introduced that allows flexible, dynamic associations across these physical boundaries. This resolves the contradiction by operating in two dimensions: fixed physical layer for precision and flexible virtual layer for adaptability.
Data Source
AI summary
A generic microprocessor architecture is provided with a set (e.g., one or more) of controlling/main processing elements (e.g., MPEs) and a set of groups of sub-processing elements (e.g., SPEs). Under this arrangement, MPEs and SPEs are organized in a way that a smaller number MPEs control the behavior of a group of SPEs using program code embodied as a set of virtualized control threads. The apparatus includes a MCP coupled to a power supply coupled with cores to provide a supply voltage to each core (or core group) and controlling-digital elements and multiple instances of sub-processing elements. In accordance with these features, virtualized control threads can traverse the physical boundaries of the MCP to control SPE(s) (e.g., logical partitions having one or more SPEs) in a different physical partition (e.g., different from the physical partition from which the virtualized control threads originated.