Electro-Optical Probing of Multi-Die Stacks via Light Path Extraction

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Solution Overview

Problem

In multi-die stacks, previous electro-optical probing methods face challenges such as obstructed light paths due to metallization layers and interference from neighboring transistors, which hinder accurate signal transition analysis.

Innovation Solution

The solution involves routing metallization layers away from the light path to create an unobstructed area for higher dies and positioning additional diodes or transistors further away from targeted ones to avoid interference, allowing for unobstructed light access and simultaneous signal monitoring.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If metallization layers are present in multi-die stacks, then electrical connectivity is achieved, but light path obstruction occurs preventing electro-optical probing

Engineering Contradiction:
Improveelectrical connectivityVSAvoidlight path obstruction
Core Design Contradiction:
ReliabilityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent extracts the metallization layer from the light path area by routing it away from the probing region. This allows the light path to remain unobstructed for electro-optical probing while the metallization layer maintains its electrical connectivity function elsewhere in the structure.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent resolves the contradiction by utilizing the third dimension (vertical routing) to separate the metallization layer from the light path in the horizontal plane. The metallization is routed through additional layers or via structures to achieve connectivity without blocking the optical path.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Measurement precision

If additional diodes or transistors are positioned close to targeted ones for monitoring, then signal detection capability is improved, but parasitic capacitance interference increases

Engineering Contradiction:
Improvesignal detection capabilityVSAvoidparasitic capacitance interference
Core Design Contradiction:
Measurement precisionVSObject-generated harmful factors

Solution Approach 1:

The patent introduces an intermediary element (additional diode or transistor) that is coupled to the targeted transistor through a coupling mechanism. This intermediary allows signal monitoring while being positioned at a distance that minimizes parasitic capacitance interference, acting as a mediator between the targeted component and the probing system.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If light path is obstructed by metallization layers, then manufacturing complexity is reduced, but electro-optical probing accuracy deteriorates

Engineering Contradiction:
Improvemanufacturing complexityVSAvoidprobing accuracy
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent segments the device structure into distinct functional regions: a probing region with unobstructed light path for electro-optical measurements, and separate metallization routing paths for electrical connectivity. This segmentation allows both manufacturing simplicity and probing accuracy to be maintained.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables accurate electro-optical probing of transistors in multi-die stacks by ensuring unobstructed light access and minimizing parasitic capacitance interference, thereby improving the reliability of signal transition analysis.

Implementation Method 1

focusing a light source of a lens onto a circuit of a first memory die of a plurality of memory dies. A light of the light source passes by a second memory die of the plurality of memory dies to the circuit of the first memory die and is reflected back toward the sensor

Methodology Applied
Scientific EffectLight transmission and reflection: Reflection

Implementation Method 2

when a drain voltage of a FET varies by switching operation, the electric field distribution at a drain boundary can also change. This can cause a change of refractive index due to the electro-optical effect of each material. When irradiating a drain by a light beam or light source through the silicon substrate, the intensity of reflected light varies corresponding to the voltage level

Methodology Applied
Scientific EffectElectro-optical effect: Electro-Optic Effects

Data Source

PatentUS20240201252A1EOP probing on multi-die stacks
Publication Date: 2024.06.20 MICRON TECHNOLOGY INC
  • US20240201252A1 patent drawing
  • US20240201252A1 patent drawing
  • US20240201252A1 patent drawing

AI summary

An example method can include focusing a light source onto a circuit of a first memory die of a plurality of memory dies. A light of the light source can reach the circuit of the memory die and can be reflected back toward a sensor. The method can further include receiving the reflection of light from the circuit at the sensor. The method can further include determining whether the circuit is transferring a particular signal based on the reflected light.