Multi-Die Voltage Regulator Partitioning
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Solution Overview
Problem
Existing voltage regulators (VRs) face inefficiencies due to the lumping of components in a single die, leading to increased routing distances and losses, which can be mitigated by partitioning VR components across multiple dies to optimize routing and technology alignment.
Innovation Solution
Partitioning VR components across multiple dies, where analog components are placed on analog technology dies and digital components on digital technology dies, with passive components on a substrate, to reduce routing distances and enhance flexibility in 2D and 3D integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If VR components are lumped in a single die, then device complexity is reduced, but routing distances increase and routing losses worsen
Solution Approach 1:
The patent divides the voltage regulator into multiple separate dies, each containing specific functional components (e.g., analog section on one die, digital section on another die). This segmentation reduces routing distances between related components while allowing each die to be optimized for its specific function, thereby reducing routing losses without overwhelming complexity.
Solution Approach 2:
The patent transitions from a 2D single-die layout to a 3D multi-die stacked architecture. By stacking dies vertically and using through-silicon vias (TSVs) for interconnects, the patent reduces horizontal routing distances and enables shorter vertical connections, significantly reducing routing losses while maintaining manageable complexity through modular design.
2Loss of energy
If VR components are partitioned across multiple dies, then routing losses are reduced, but device complexity increases
Solution Approach 1:
The voltage regulator is segmented into functional modules distributed across multiple dies, with each die containing specific components (e.g., power switches, control logic, sense circuitry). This segmentation reduces routing losses by placing related components close together while managing complexity through clear functional separation and standardized interconnect interfaces.
Solution Approach 2:
The patent introduces intermediary structures such as substrate interconnects, TSVs, and package-level routing to facilitate communication between partitioned dies. These intermediaries manage the complexity of multi-die integration by providing standardized, reliable connection methods that abstract the underlying complexity from the functional design.
3Adaptability or versatility
If components are placed on different technology dies, then technology alignment is optimized, but manufacturing complexity increases
Solution Approach 1:
The patent applies local quality by placing components on dies fabricated with technology optimized for their specific functional requirements. For example, analog components requiring high precision are placed on dies using specialized analog processes, while digital control logic is placed on dies using digital CMOS processes. This local optimization improves overall system performance while manufacturing complexity is managed through established multi-die packaging techniques.
Solution Approach 2:
The patent segments the VR design into separate functional blocks that can be independently fabricated using appropriate technology nodes and processes. Each segment is designed and manufactured separately with technology-specific optimizations, then integrated at the package level. This approach enables technology alignment while leveraging mature, well-understood multi-die manufacturing and packaging processes.
Data Source
AI summary
A semiconductor package is provided, which includes a first die and a second die. The first die includes a first section of a power converter, and the second die includes a second section of the power converter. The power converter may include a plurality of switches, and a Power Management (PM) circuitry to control operation of the power converter by controlling switching of the plurality of switches. The PM circuitry may include a first part and a second part. The first section of the power converter in the first die may include the first part of the PM circuitry, and the second section of the power converter in the second die may include the second part of the PM circuitry.