A driver adjusts switch turn-on timing between voltage valleys to maintain high switching efficiency.
A flyback power converter circuit regulates internal output voltage to reduce standby power consumption.
A power saving circuit uses a switching signal to disable internal circuits.
Current monitoring circuits manage MOSFET switching states to reduce energy loss and maintain efficiency at higher input voltages.
External comparator and power disconnect MOSFET limit peak voltage and current during faults, ensuring safe operation of synchronous buck regulators.
Synchronous detection with periodic modulation extracts power loss signals while rejecting coherent load transients and instrumentation offset errors.
Segmented switching phases in an OLED charge pump maintain high efficiency when output voltage approaches operating levels.
Dynamic resistance control resolves the trade-off between conduction losses and measurement precision in synchronous rectifiers.
A dual current control mechanism manages inductor current delivery to handle rapid load fluctuations.
Parallel LC tank circuit stabilizes primary impedance, maintaining quality factor across varying load impedances.
A drive circuit uses a diode with negative temperature characteristics to adjust the voltage applied to the power element's emitter.
Galvanic isolation in a linear LED tube limits shock current to prevent fatal injuries and internal arcing during maintenance.
Partition voltage regulator components across separate dies to reduce routing distances, mitigating energy losses from long interconnects in single-die designs.
A power supply system uses a phase shifter and compensator to generate pulse width modulation signals for coupled inductor applications.
A boost rectifier uses zero-voltage switching to reduce common-mode noise and input-current total harmonic distortion.
A multi-phase parallel converter uses a bias voltage generator to adjust phase currents during switching operations.
Independent control of asymmetric parallel switches resolves light-load gate loss trade-offs while maintaining full-load conduction efficiency.
An AC emulation circuit derives accurate high-side current from low-side sensing and dynamic inductance values, eliminating preset parameter errors.
A synchronous buck converter switches between PWM and light-load modes to reduce switching losses.
Replica transistors linearize node voltages to enable accurate valley current detection, resolving instability caused by diode-mode high-side switches.
A tap sense circuit detects voltage across a power switch to trigger zero-voltage switching, eliminating extra sensing pins and reducing controller complexity.
A DC-DC converter uses a PWM controller to adjust booster and inverter circuits for stable power generation.
A control device monitors transformer energy signals to manage integrated circuit operation states.
Dynamic on-time adjustment resolves poor transient response and inefficient mode transitions by regulating output voltage against reference signals.
Magnetically coupled inductors enforce phase shift between resonant converters, reducing EMI and control complexity.
A power supply device shapes input voltage using a discharge switch coupled to a filter capacitor.
Dynamic resonant capacitor adjustment maintains high energy transmission efficiency across varying output voltage ranges.
A dual-transistor driver circuit manages gate timing to control switching transitions.
Dynamic mode switching and bypass devices reduce switching losses and common mode EMI while maintaining silicon device compatibility.
A PWM controller uses a voltage-dividing unit and tri-state voltage generation circuit to rapidly pull the output pin to a tri-state level.
Summing inductor and capacitor currents resolves dynamic mode inaccuracies caused by LC-filtering effects.
A ripple cancellation converter generates a second AC voltage ripple connected in series with the main output to provide substantially ripple-free DC power.
A minimum DCM current threshold enables immediate load level detection in switching converters.
Buffer circuit with coupled inductors creates phase interlacing shifts between voltage and current, reducing switching losses in power factor correctors.
A flyback converter control circuit detects sensing impedance bypass conditions to adjust switch operating frequency.
A power supply apparatus uses an intermittent driving unit to periodically activate a no-load detecting unit for sensing electronic device removal.
Oscillator freeze logic prevents phase accumulation during dead zones to resolve primary-secondary switch synchronization issues.
A semiconductor device design minimizes parasitic inductance through strategic component placement on an insulating substrate.
A power factor correction circuit dynamically switches between conduction modes based on input voltage amplitude to optimize energy release.
A power conversion device uses a control unit to estimate input and output currents through AD conversion data.
An electronic controller enables a snubber circuit only when voltage exceeds setpoints, reducing power dissipation while maintaining ringing attenuation.
An edge-aligned metal connection on a semiconductor die joins high-side and low-side switches, reducing parasitic inductance that causes voltage overshoot.
Dynamic phase shift control reduces circulating current duration in wide voltage range PSFB converters, maintaining high efficiency during output regulation.
A voltage regulator uses a boost circuit to switch power modes based on digital signals.
A buck converter controller monitors inductor discharge current to determine average load conditions for precise mode transitions.
A low voltage DC-DC converter uses a zero voltage switching auxiliary circuit to consume residual energy during transitions.
A control IC for switch power supplies dynamically adjusts frequency and duty ratio to maintain output voltage.
Magnetic coupling elements transfer power between switch stages in a cascaded voltage converter, enabling high throughput without large capacitors.
A control circuit manages high and low side switches to maintain stable output voltage at ultra-low input levels.
A continuous conduction mode power factor correction circuit uses carrier signal intersection to set drive transistor ON time.